SL75232
Line Driver / Receiver
Description
Block Diagram
The SL75232N, SL75232D are monolithic device
containing 3 independent drives and 5 receivers. These are
designed to interface between date terminal equipment and
date communication equipment as designed by EIA-232-D.
V
1
20
V C C
C
C +
R A 1
R A 2
R A 3
D Y 1
D Y 2
2
3
19
18
17
16
15
14
13
12
R Y 1
R Y 2
R Y 3
D A 1
D A 2
R Y 4
D A 3
R Y 5
Features
· Meets standard EIA-232-D (Revision of RS-232-C)
· Drivers
- Current Limited Output
- Power-off Output Impedance
- Slew Rate Control by Load Capacitor
- Flexible Supply Voltage Range
- Input Compatible with Most TTL and DTL Circuits
· Receivers
- Input Resistance
- Input Signal Range
4
10 mA Typical
300 W Min
5
6
R A 4
D Y 3
R A 5
7
8
3 kW to 7 kW
± 30 V
9
- Built-in Input Hysteresis (Double Threshold)
V
10
11 G N D
C
C -
· 20 DIP/SO20: Ì S-001AD (SL75232N) / Ì S-013AÑ
(SL75232D)
IL75232N, IL75232D
Pin Description
Name
VCC+
DA1
DA2
DA3
VCC
RA1
RA2
RA3
RA4
RA5
Pin No
Function
Name
VCC-
DY1
DY2
DY3
GND
RY1
RY2
RY3
RY4
RY5
Pin No
10
5
Function
1
16
15
13
20
2
3
4
7
9
Driver Section Supply +
Driver Section Supply -
6
8
Driver Output
Ground
Driver Input
Receiver Section Supply
11
19
18
17
14
12
Receiver Input
Receiver Output
System Logic
Semiconductor
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
