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34063AP1 参数 Datasheet PDF下载

34063AP1图片预览
型号: 34063AP1
PDF下载: 下载PDF文件 查看货源
内容描述: DC- TO- DC转换器控制电路 [DC-TO-DC CONVERTER CONTROL CIRCUITS]
分类和应用: 转换器
文件页数/大小: 2 页 / 76 K
品牌: SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
 浏览型号34063AP1的Datasheet PDF文件第1页  
SL34063A  
ORDERING INFORMATION  
Pin connection  
Device  
Temperature Range Package  
34063AD 0° to +70°C  
34063AP1  
SO-8  
Plastic DIP  
ELECTRICAL CHARACTERICISTICS  
(VCC = 5.0 V, TA= 0 to +70oC unless otherwise specified.)  
Characteristics  
Symbol  
Min  
Typ  
Max  
Unit  
OSCILLATOR  
Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C)  
Charge Current (VCC = 5.0 V to 40 V, TA = 25°C)  
Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C)  
Discharge to Charge Current Ratio (Pin7 to Vcc, TA=25°C)  
Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C)  
fosc  
Ichg  
24  
24  
140  
33  
33  
200  
6.2  
300  
42  
42  
260  
7.5  
350  
kHz  
mA  
mA  
mV  
Idischg  
Idischg/Ichg 5.2  
Vlpk(sense) 250  
OUTPUT SWITCH (Note 3)  
Saturation Voltage, Darlington Connection (ISW = 1.0 A,  
Pins 1, 8 connected)  
VCE(sat)  
1.0  
1.3  
0.7  
V
V
Saturation Voltage (ISW = 1.0 A, RPin 8 = 82 W to VCC.  
Forced b = 20)  
VCE(sat)  
0.45  
=
DC Current Gain (ISW = 1.0 A, VCE 5.0 V, TA = 25°C)  
hFE  
IC(off)  
50  
120  
0.01  
100  
mA  
Collector Off-State Current (VCE = 40V)  
COMPARATOR  
Threshold Voltage (TA = 25°C)  
(TA = TLOW to THIGH  
Threshold Voltage (TA = 25°C) **  
Vth  
1.225  
1.21  
1.2375  
1.25  
1.25  
1.275  
1.29  
1.2625  
V
)
Vth  
V
Threshold Voltage Line Regulation (VCC = 3 0 V to 40 V)  
Input Bias Current (Vin=0V)  
Regime  
IIB  
1.4  
-40  
5.0  
-400  
mV  
nA  
TOTAL DEVICE  
Supply Current (VCC = 5 0 V to 40 V, CT = 1 0 nF, Vpin7 = VCC  
VPin5 > Vth, Pin 2 = Gnd, Remaining pins open)  
.
ICC  
2.5  
4.0  
mA  
NOTES:  
1. Maximum package power dissipation limits must be observed.  
2.Low duty cycle pulse techniques are used during test to maintain Junction temperature as close to ambient temperature as  
possible  
3.If the output switch is driven into hard saturation (non Darlington configuration) at low switch currents (< 300 mA) and high  
driver currents (>30 mA), it may take up to 2.0 ms to come out of saturation This condition will shorten the off' time at  
frequencies > 30 kHz, and is magnified at high temperatures This condition does not occur with a Darlington configuration,  
since the output switch cannot saturate If a non Darlington configuration is used, the following output drive condition is  
recommended  
Forced b of output switch = IC, output/(Ic, driver -7.0 mA*) > 10  
*The 100 W. resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts  
**Possible version for shipment  
System Logic  
SLS  
Semiconductor  
2