ST8016T
7.2.2
Relationship between the display data and LCD drive output Pins
(Segment Mode)
(a) 4-bit Parallel Input Mode
DATA
INPUT
DI0
Dl1
DI2
DI3
DI0
Dl1
DI2
NUMBER OF CLOCKS
40 CLOCK 39 CLOCK 38 CLOCK … 3 CLOCK 2 CLOCK 1 CLOCK
MD
L/R
EIO1
EIO2
Y1
Y2
Y5
Y6
Y9
Y10
…
…
…
…
…
…
…
…
Y149
Y150
Y151
Y152
Y12
Y153
Y154
Y155
Y156
Y8
Y157
Y158
Y159
Y160
Y4
L
L
Output Input
Input Output
Y3
Y7
Y11
Y4
Y8
Y12
Y160
Y159
Y158
Y157
Y156
Y155
Y154
Y153
Y152
Y151
Y150
Y149
Y11
Y10
Y9
Y7
Y6
Y5
Y3
Y2
Y1
L
H
DI3
(b) 8-bit Parallel Input Mode
DATA
INPUT
DI0
Dl1
DI2
DI3
DI4
DI5
DI6
DI7
DI0
Dl1
DI2
DI3
DI4
Dl5
DI6
DI7
NUMBER OF CLOCKS
20 CLOCK 19 CLOCK 18 CLOCK … 3 CLOCK 2 CLOCK 1 CLOCK
MD
L/R
EIO1
EIO2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y160
Y159
Y158
Y157
Y156
Y155
Y154
Y153
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y152
Y151
Y150
Y149
Y148
Y147
Y146
Y145
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y144
Y143
Y142
Y141
Y140
Y139
Y138
Y137
…
…
…
…
Y137
Y138
Y139
Y140
Y141
Y142
Y143
Y144
Y24
Y145
Y146
Y147
Y148
Y149
Y150
Y151
Y152
Y16
Y153
Y154
Y155
Y156
Y157
Y158
Y159
Y160
Y8
H
L
Output Input
…
…
…
…
…
…
…
…
Y23
Y15
Y7
Y22
Y14
Y6
Y21
Y13
Y5
H
H
Input Output
Y20
Y12
Y4
Y19
Y11
Y3
Y18
Y10
Y2
Y17
Y9
Y1
(Common Mode)
MD
L
(Single)
L/R
L
DATA TRANSFER DIRECTION
Y160 → Y1
EIO1
Output
Input
EIO2
Input
DI7
X
X
H
Output
Y1 → Y160
Y160 → Y81
L
Output
Input
Input
Input
Input
H
(Dual)
Y80 → Y1
Y1 → Y80
H
Output
Y81 → Y160
NOTES:
1. L : LGND (0 V), H : VDD (+2.5 to +5.5 V), X : Don't care
2. "Don't care" should be fixed to "H" or "L", avoiding floating.
Preliminary Ver 0.12
Page 10/27
2007/10/29
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
