ST7920
Pin Description (continued)
Name
No.
I/O
Connects to
Description
CAP3M
CAP1P
CAP1M
CAP2M
XOFF
34
35
36
38
32
37
72
Capacitor pins for voltage doubler
I/O
Capacitors
≦
Voltage
7V.
―
―
―
O
―
Reserved (no connection).
Reserved (no connection).
Reserved (no connection).
Voltage doubler reference voltage.
If use internal voltage doubler, please
make sure that:
CAP2P
C[33]
O
VD2
39
I
Reference voltage
≦
3.5V or
l
VD2
≦
≦
7V.
l
VOUT
7V and CAP3M
―
―
―
CLK
TT1
TT2
4
5
6
For CGROM/HCGROM checksum.
Refer to checksum application.
I
Note:
1.
7V>=VOUT>=V0>=V1>=V2>=V3>=V4 must be maintained
Two clock options: As shown below.
2.
OSC1
OSC2
OSC1
OSC2
R
Clock input
R=33K (VDD=5.0V)
R=18K (VDD=2.7V)
External Resistor vs. Current
(VDD=5V)
External Resistor vs. Frequency
(VDD=5V)
800
700
600
500
400
300
200
100
0
900
800
700
600
500
400
300
200
100
0
5
15
25
40
60
80
100
5
15
25
40
60
80
100
Resistor(K)
Resistor(K)
3.
When using voltage doubler (VOUT), it is recommended that the sum of those divide resistors (R1~R5) should be larger than 20K Ohm.
So that the voltage doubler can provide sufficient power.
V4.0
8/49
2008/08/18
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
