ST7628
(2) 4096-color display
(1-1) Type A 4096 color display
1. 8-bit interface
D7, D6, D5, D4, D3, D2, D1, D0: RRRRGGGG
D7, D6, D5, D4, D3, D2, D1, D0: BBBBRRRR
D7, D6, D5, D4, D3, D2, D1, D0: GGGGBBBB
There are 3 write operations for 2 pixel data.
1st writes
2nd writes
3rd writes
1st pixel data is written in the display data RAM when 2nd –write operation finishes, and 2nd pixel data is written in the
display data RAM when 3rd–write operation finishes.
2. 16-bit interface
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: RRRRGGGGBBBBXXXX
There is only 1 write operation for 1 pixel data.
1 pixel data is written in the display data RAM when 1st –write operation finishes. “X” are ignored dummy bits.
(1-2) Type B 4096 color display
1. 8-bit interface
D7, D6, D5, D4, D3, D2, D1, D0: XXXXRRRR
D7, D6, D5, D4, D3, D2, D1, D0: GGGGBBBB
There are 2 write operations for 1 pixel data.
1st writes
2nd writes
1st pixel data is written in the display data RAM when 2nd –write operation finishes. “X” are ignored dummy bits.
2. 16-bit interface
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: XXXXRRRRGGGGBBBB
There is only 1 write operation for 1 pixel data.
1 pixel data is written in the display data RAM when 1st –write operation finishes. “X” are ignored dummy bits.
(3) 65K color input mode
1. 8-bit interface
D7, D6, D5, D4, D3, D2, D1, D0: RRRRRGGG
D7, D6, D5, D4, D3, D2, D1, D0: GGGBBBBB
There are 2 write operations for 1 pixel data.
1st writes
2nd writes
1st pixel data is written in the display data RAM when 2nd –write operation finishes.
2. 16-bit interface
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: RRRRRGGGGGGBBBBB
There is only 1 write operation for 1 pixel data.
1st writes
1 pixel data is written in the display data RAM when 1st –write operation finishes.
Ver 1.4
19/213
2008/08