ST7578
DISPLAY DATA RAM (DDRAM)
ST7578 contains a 66X102 bit static RAM that stores the display data. The display data RAM (DDRAM) store the dot data
for the LCD. It is an addressable array with 102 columns by 66 rows (8-page with 8-bit, 1-page with 1-bit and 1-page with
1-bit). The X-address is directly related to the column output number. Each pixel can be selected when the page and
column addresses are specified. The rows are divided into: 8 pages (page 0~7) each with 8 lines (for COM0~63), the 8th
page with only 1 line (for COM64) and the 9th page with only 1 line (the 65th row, COMS, for icon). The display data (D7~D0)
corresponds to the LCD common-line direction (default: D7 at top when DO=0). Those pages with 8 lines can be accessed
through D[7:0] directly. When accessing those pages with fewer than 8 lines, the valid bit(s) in D[7:0] should be checked.
Refer to Fig 9 and Fig 10 for detailed illustration. The microprocessor can write to and read from (only Parallel interfaces)
DDRAM by the I/O buffer. Since the LCD controller operates independently, data can be written into DDRAM at the same
time as data is being displayed without causing the LCD flicker or data-conflict.
Page Address Circuit
This circuit is for providing a Page Address to Display Data RAM. It incorporates 4-bit Page Address register changed by
only the “Set Page” instruction. Page Address 9 is a special RAM area for the icons and display data is only 1-bit valid
(DO=0, D7 is valid; DO=1, D0 is valid).
Line Address Circuit
This circuit controls each line in DDRAM to transfer 102-bit line data to the display data latch circuit. Therefore, the content
in DDRAM can be transferred to the segment outputs and the content can be displayed on the LCD module as shown in Fig
13. At the beginning of each LCD frame, the 102-bit RAM data of Line-0 are transferred to the display data latch circuit. At
the next line period, the Line Address is increased by one and the 102-bit RAM data at the next line are transferred to the
display data latch circuit. The 102-bit icon data are transferred at the last line period during each frame.
Ver 1.2
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2007/04/30
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
