ST7578
Data Transfer
ST7578 uses bus holder and internal data bus for data transfer with MPU. When writing data from the MPU to on-chip RAM,
data is automatically transferred from the bus holder to the RAM as shown in Fig 6. And when reading data from on-chip
RAM to the MPU, the data for the initial read cycle is stored in the bus holder (dummy read) and the MPU reads this stored
data from bus holder for the next data read cycle as shown in Fig 7. This means that a dummy read cycle must be inserted
between each pair of address sets when a sequence of address sets is executed. Therefore, the data of the specified
address cannot be output with the read display data instruction right after the address sets, but can be output at the second
read of data.
MPU signal
A0
/WR
D0 to D7
N
N
D(N)
D(N+1) D(N+2) D(N+3)
Internal signals
/WR
BUS HOLDER
COLUMN ADDRESS
D(N)
N
D(N+1) D(N+2) D(N+3)
N+1 N+2 N+3
Fig 6. Data Transfer : Write
MPU signal
A0
/WR
/RD
D0 to D7
N
Dummy D(N) D(N+1)
Internal signals
/WR
/RD
BUS HOLDER
COLUMN ADDRESS
N
D(N) D(N+1) D(N+2)
D(N) D(N+1) D(N+2)
N
Fig 7. Data Transfer : Read
Ver 1.2
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2007/04/30
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
