ST7066U
n Instructions
There are four categories of instructions that:
l
l
l
l
Designate ST7066U functions, such as display format, data length, etc.
Set internal RAM addresses
Perform data transfer with internal RAM
Others
Instruction Table:
Instruction Code
Description
Instruction
Description
Time
(270KHz)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Write "20H" to DDRAM. and
set DDRAM address to
"00H" from AC
Clear
Display
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
x
1.52 ms
1.52 ms
Set DDRAM address to
"00H" from AC and return
cursor to its original position
if shifted. The contents of
DDRAM are not changed.
Sets cursor move direction
and specifies display shift.
These operations are
performed during data write
and read.
Return
Home
Entry Mode
Set
0
0
0
0
0
0
0
1
1
I/D
S
37 us
D=1:entire display on
C=1:cursor on
Display
ON/OFF
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
D
C
x
B
x
37 us
37 us
37 us
B=1:cursor position on
Set cursor moving and
display shift control bit, and
the direction, without
Cursor or
Display
Shift
S/C R/L
changing DDRAM data.
DL:interface data is 8/4 bits
N:number of line is 2/1
F:font size is 5x11/5x8
Function
Set
0
1
DL
N
F
x
x
Set CGRAM
address
Set CGRAM address in
address counter
0
0
0
0
0
1
AC5 AC4 AC3 AC2 AC1 AC0
37 us
37 us
Set DDRAM
address
Set DDRAM address in
address counter
AC6 AC5 AC4 AC3 AC2 AC1 AC0
Whether during internal
operation or not can be
Read Busy
flag and
address
0
1
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 known by reading BF. The
contents of address counter
0 us
can also be read.
Write data into internal
Write data
to RAM
1
1
0
1
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0 RAM
(DDRAM/CGRAM)
Read data from internal
D0 RAM
(DDRAM/CGRAM)
37 us
37 us
Read data
from RAM
Note:
Be sure the ST7066U is not in the busy state (BF = 0) before sending an instruction from the MPU to the
ST7066U. If an instruction is sent without checking the busy flag, the time between the first instruction and next
instruction will take much longer than the instruction time itself. Refer to Instruction Table for the list of each
instruction execution time.
V2.2
17/42
2006/05/11
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
