ST3024
3
SIGNAL DESCRIPTIONS
Table 3-1
Function
Group
Pin Name
RESET
PWD
PWDA
OSCXI
System control
OSXO
ECLK
CMODE[1:0]
TEST[2:0]
SO[1:0]/
DPA[7,15]
CLKO/
DPA[6]
DAP[13,14],
DPB[0:15]
XREQ/DPA[5]
TF0/DPA[0]
RF0/DPA[1]
TX0/DPA[2]
RX0/DPA[3]
SCLK0/DPA[4]
TF1/DPA[8]
RF1/DPA[9]
TX1/DPA[10]
RX1/DPA[11]
SCLK1/DPA[12]
D[0]/SCL
D[1]/SDI
D[2]/SDO
D[3:7]
WR
RD
CS
CMD
REQ
RDY
PMODE
Pin #
1
1
1
1
1
1
2
3
2
1
18
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
1
1
1
1
1
1
1
Signal Function Description
I/O
I
I
O
I
O
I
I
I
O
O
I/O
I
O
I
O
I
O
O
I
O
I
O
I/O
I/O
I/O
I/O
I
I
I
I
O
O
I
Description
System reset, low active
Power down, low active
Power down acknowledge, high active
Crystal input or R-oscillator input. If not used, it connects to
GND
Crystal output. If not used, it connects to GND
External clock input. If not used, it connects to GND
Clock source select
01=Crystal. ECLK connects to GND
1X=ECLK. OSCXI and OSXO connect to GND
Test mode. TEST[2:0] connect to GND
SO0/DPA[7], SO1/DPA[15]
Clock output/DPA[6]
General I/O
External interrupt/DPA[5]
Transmit frame synchronization/DPA[0]
Receive frame synchronization/DPA[1]
Serial data transmit/DPA[2]
Serial data receive/DPA[3]
Serial clock/DPA[4]
Transmit frame synchronization/DPA[8]
Receive frame synchronization/DPA[9]
Serial data transmit/DPA[10]
Serial data receive/DPA[11]
Serial clock/DPA[12]
Parallel : Data bus
Parallel : Data bus
Parallel : Data bus
Parallel : Data bus
Parallel : Write enable, low active
Parallel : Read enable, low active
Parallel : Chip select, low active
Parallel : Command/data select
“H”
Data
:
“L”
Command
:
DSP wants to sent command to MCU, low active
DSP permit MCU access data, low active
Parallel interface select
0: Parallel (default). Connecting to GND
1: Not used
Special I/O
GPIO
External
Interrupt
Serial Port0/
DPA[4:0]
Serial Port1/
DPA[12:8]
MCU Interface
Preliminary Ver 0.1
Page 4/13
2007/06/20
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
