ST2202A
21. WATCHDOG TIMER
Theꢀwatchdogꢀtimerꢀ(WDT)ꢀisꢀanꢀaddedꢀcheckꢀthatꢀaꢀ
programꢀisꢀrunningꢀandꢀsequencingꢀproperly.ꢀWhenꢀtheꢀ
applicationꢀsoftwareꢀisꢀrunning,ꢀitꢀisꢀresponsibleꢀforꢀkeepingꢀ
theꢀ2ꢁꢀorꢀ8ꢁsecondꢀwatchdogꢀtimerꢀfromꢀtimingꢀout.ꢀIfꢀtheꢀ
watchdogꢀtimerꢀtimesꢀout,ꢀitꢀisꢀanꢀindicationꢀthatꢀtheꢀ
softwareꢀisꢀnoꢀlongerꢀbeingꢀexecutedꢀinꢀtheꢀintendedꢀ
sequence.ꢀAtꢀthisꢀtimeꢀtheꢀwatchdogꢀtimerꢀgeneratesꢀaꢀ
resetꢀsignalꢀtoꢀtheꢀsystem.
21.1 WDT Operations
TheꢀWDTꢀisꢀenabledꢀbyꢀsettingꢀtheꢀWDTꢀenableꢀflagꢀ
WDTENꢀ(MISC[3]).ꢀTwoꢀtimeꢀsettings,ꢀ2ꢀandꢀ8ꢀseconds,ꢀ
areꢀselectableꢀwithꢀselectionꢀbitꢀWDTPSꢀ(MISC[2]).WDTꢀisꢀ
clockedꢀbyꢀtheꢀ2Hzꢀclockꢀfromꢀtheꢀbaseꢀtimerꢀandꢀthereforeꢀ
hasꢀ0.5ꢁsecondꢀresolution.ꢀItꢀisꢀrecommendedꢀthatꢀtheꢀ
watchdogꢀtimerꢀbeꢀperiodicallyꢀclearedꢀbyꢀsoftwareꢀonceꢀitꢀ
isꢀenabled.ꢀOtherwise,ꢀsoftwareꢀresetꢀwillꢀbeꢀgeneratedꢀ
ꢀ
whenꢀtheꢀtimerꢀreachedꢀaꢀbinaryꢀvalueꢀofꢀ4ꢀorꢀ16.ꢀ
ꢀ
Note:TheꢀWDTꢀcanꢀbeꢀresetꢀbyꢀwritingꢀanyꢀvalueꢀ
toꢀMISCꢀregister.ꢀ
ꢀ
Afterꢀaꢀsystemꢀreset,ꢀWDTENꢀisꢀcleared.ꢀThenꢀtheꢀ
WDTꢀreturnsꢀtoꢀbeꢀidle.ꢀ
ꢀ
TABLE 21-1 System Miscellaneous Register (MISC)
Address Name R/W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
Rꢀ
Wꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
WDTENꢀ WDTPSꢀ TESTꢀ
TESTꢀ ꢁꢀꢁꢀꢁꢀꢁꢀ0000ꢀ
ꢀ
$038 MISC
ResetꢀWDTꢀ
ꢀ
Bitꢀ2:ꢀ ꢀ WDTPS :ꢀWDTꢀtimeꢁoutꢀtimeꢀselectionꢀbitꢀ
ꢀ=ꢀ8ꢀsecondsꢀ
0
1ꢀ=ꢀ2ꢀsecondsꢀ
ꢀ
Bitꢀ3:ꢀ ꢀ WDTEN :ꢀWDTꢀcontrolꢀbitꢀ
0
ꢀ=ꢀDisableꢀWDTꢀ
1ꢀ=ꢀEnableꢀWDTꢀ
ꢀ
Bitꢀ1~0:ꢀ ꢀ TESTꢀ:ꢀTheseꢀtwoꢀbitsꢀshouldꢀbeꢀbothꢀzeroꢀinꢀnormalꢀoperationꢀ
ꢀ
ꢀ
Verꢀ2.5ꢀ
62
/
75
ꢀ
9/16/2008ꢀ
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