HV7370
Logic Inputs
Sym
VIH
VIL
IIH
Parameter
Min
Typ
Max
VLL
0.4
10
-
Units Conditions
Input logic high voltage
Input logic low voltage
Input logic high current
Input logic low current
Input logic capacitance
(VLL -0.4)
-
-
V
---
---
---
---
---
0
-
V
-
µA
µA
pF
IIL
-10
-
-
CIN
5
-
AC Electrical Characteristics
(Operating conditions, unless otherwise specified, VSS = 0V,VLL = +3.3V,VDD = VDN = +9V, VDP = -9V, VPP - VPF = +9V, VNN - VNF = -9V, VSUB = +75V VPP/VNN = ±75V, TA = 25°C)
Sym
trp
Parameter
Min
Typ
26
Max
Units Conditions
P-FET output rise time
N-FET output fall time
Output frequency range
Enable time
-
-
-
-
-
-
-
-
-
-
-
ns
330pF//2.5kΩ load
tfn
26
-
ns
fOUT
tEN
tEN
tdrp
tdfp
tdrn
tdfn
-
20
MHz ---
180
2.8
19
500
100Ω resistor load,
+10V to NDX and -10V to PDX
µs
ns
Disable time
10
-
P-FET on delay time
P-FET off delay time
N-FET on delay time
N-FET off delay time
17
-
8.2Ω resistor load
(see timing diagram)
19
-
17
-
ΔtDELAY |tdr - tdf| delay time matching
±3.0
-
ns
ps
P to N, channel to channel
VPP/VNN = ±25V, input rising 50% to
output PDX/NDX rising/falling 50%,
with 100Ω load
tJ Delay time jitter, rise or fall
-
15
-
4
SIRECTIFIER [ SIRECTIFIER SEMICONDUCTORS ]
