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SP690TEN 参数 Datasheet PDF下载

SP690TEN图片预览
型号: SP690TEN
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0V / 3.3V低功耗微处理器监控与电池切换 [3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over]
分类和应用: 电源电路电池电源管理电路微处理器光电二极管监控
文件页数/大小: 20 页 / 236 K
品牌: SIPEX [ SIPEX CORPORATION ]
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Buffered RESET connects to System Components  
1nF Capacitor  
VOUT TO GND  
VCC  
VCC  
µP  
Above Line  
RESET  
RESET  
RESET  
Generated  
NO  
4.7KΩ  
RESET  
Generated  
GND  
GND  
Figure 24. Interfacing to Microprocessors with  
Bidirectional RESET I/O  
Figure 25. Maximum Transient Duration without  
Causing a Reset Pulse vs. Reset Comparator Overdrive  
Monitoring an Additional Power Supply  
Figure 25 shows maximum transient duration  
vs. reset-comparator overdrive, for which reset  
pulses are not generated. The data was generated  
using negative-going VCC pulses, starting at  
3.3V and ending below the reset threshold by  
the magnitude indicated (reset comparator  
overdrive).Thegraphshowsthemaximumpulse  
width a negative-going VCC transient may  
typically have without causing a reset pulse to  
be issued. As the amplitude of the transient  
increases (i.e. goes farther below the reset  
threshold), the maximum allowable pulse width  
decreases. Typically, a VCC transient that goes  
100mV below the reset threshold and lasts for  
40µs or less will not cause a reset pulse to be  
issued.A100nFbypasscapacitormountedclose  
to the VCC pin provides additional transient  
immunity.  
These µP supervisors can monitor either positive  
or negative supplies using a resistor voltage  
divider to PFI. PFO can be used to generate an  
interrupt to the µP, as seen in Figure 23.  
Interfacing to µPs with Bidirectional  
Reset Pins  
Any µPs with bidirectional reset pins, such as  
the Motorola 68HC11 series, can interface with  
the SP690_ and the SP802_ RESET outputs.  
For example, if the RESET output is driven  
HIGH and the µP wants to pull it LOW,  
indeterminate logic levels may result. To correct  
this, connect a 4.7kresistor between the  
RESET output and the µP reset I/O, as in  
Figure 24. Buffer the RESET output to other  
system components.  
Negative-Going VCC Transients  
While issuing resets to the µP during power-up,  
power-down, and brownout conditions, these  
supervisors are relatively immune to short-  
duration negative-going VCC transients  
(glitches). It is usually undesirable to reset the  
µP when VCC experiences only small glitches.  
SP690T/S/R DS/10 SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory  
© Copyright 2000 Sipex Corporation  
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