V
DM
R
S1
R
L
= 27Ω
D
V
CC
V
OD
R
GENERATOR
(NOTE 1)
50Ω
D
OUT
C
L
= 15pF
(NOTE 2)
V
OC
V
CC
V
OM
= V
OH
+ V
OL
2
1.5V
Figure 1. Driver DC Test Load Circuit
Figure 2. Driver Propagation Delay Test Circuit
S1
D
OUT
C
L
= 50pF
(NOTE 2)
GENERATOR
(NOTE 1)
50Ω
R
L
= 110Ω
C
L
D
GENERATOR
(NOTE 1)
50Ω
V
CC
R
L
=
60Ω
OUT
C
L
= 15pF (NOTE 2)
V
OM
= V
OH
+ V
OL
2
1.5V
Figure 3. Driver Differential Output Delay and Transition
Time Circuit
V
CC
R
L
= 110Ω
S1
0V OR 3V
D
C
L
= 50pF
(NOTE 2)
GENERATOR
(NOTE 1)
50Ω
OUT
Figure 4. Driver Enable and Disable Timing Circuit,
Output HIGH
V
ID
GENERATOR
(NOTE 1)
R
OUT
C
L
= 15pF
(NOTE 2)
50Ω
1.5V
0V
V
OM
= V
CC
2
Figure 5. Driver Enable and Disable Timing Circuit,
Output LOW
Figure 6. Receiver Propagation Delay Test Circuit
1.5V
-1.5V
S3
1k
V
ID
R
S1
V
CC
S2
C
L
= 15pF
(NOTE 2)
GENERATOR
(NOTE 1)
50Ω
Figure 7. Receiver Enable and Disable Timing Circuit
INPUTS
RE
X
X
X
DE
1
1
0
DI
1
0
X
LINE
CONDITION
No Fault
No Fault
X
OUTPUTS
B
0
1
Z
A
1
0
Z
INPUTS
RE
DE
0
0
0
0
0
0
1
0
OUTPUTS
A-B
R
+0.2V
1
-0.2V
0
Inputs Open
1
X
Z
© Copyright 2002 Sipex Corporation
Table 1. Transmit Function Truth Table
10/15/02
Table 2. Receive Function Truth Table
SP3481/3485 Low Power Half-Duplex RS485 Transceivers
5
SIPEX [ SIPEX CORPORATION ]
