欢迎访问ic37.com |
会员登录 免费注册
发布采购

STK15C68-WF35I 参数 Datasheet PDF下载

STK15C68-WF35I图片预览
型号: STK15C68-WF35I
PDF下载: 下载PDF文件 查看货源
内容描述: 8K ×8 AutoStore⑩的nvSRAM QuantumTrap⑩ CMOS非易失性静态RAM [8K x 8 AutoStore⑩ nvSRAM QuantumTrap⑩ CMOS Nonvolatile Static RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 10 页 / 385 K
品牌: SIMTEK [ SIMTEK CORPORATION ]
 浏览型号STK15C68-WF35I的Datasheet PDF文件第2页浏览型号STK15C68-WF35I的Datasheet PDF文件第3页浏览型号STK15C68-WF35I的Datasheet PDF文件第4页浏览型号STK15C68-WF35I的Datasheet PDF文件第5页浏览型号STK15C68-WF35I的Datasheet PDF文件第6页浏览型号STK15C68-WF35I的Datasheet PDF文件第7页浏览型号STK15C68-WF35I的Datasheet PDF文件第9页浏览型号STK15C68-WF35I的Datasheet PDF文件第10页  
STK15C68  
Internally, RECALL is a two-step procedure. First,  
the SRAM data is cleared, and second, the nonvola-  
tile information is transferred into the SRAM cells.  
After the tRECALL cycle time the SRAM will once again  
be ready for READ and WRITE operations. The  
RECALL operation in no way alters the data in the  
Nonvolatile Elements. The nonvolatile data can be  
recalled an unlimited number of times.  
If the STK15C68 is in a WRITE state at the end of  
power-up RECALL, the SRAM data will be corrupted.  
To help avoid this situation, a 10K Ohm resistor  
should be connected either between W and system  
VCC or between E and system VCC.  
HARDWARE PROTECT  
The STK15C68 offers hardware protection against  
inadvertent STORE operation and SRAM WRITEs  
AutoStore™ OPERATION  
during low-voltage conditions. When VCC < VSWITCH  
,
The STK15C68 uses the intrinsic system capaci-  
tance to perform an automatic store on power  
down. As long as the system power supply takes at  
least tSTORE to decay from VSWITCH down to 3.6V, the  
STK15C68 will safely and automatically store the  
SRAM data in Nonvolatile Elements on power  
down.  
software STORE operations and SRAM WRITEs are  
inhibited.  
LOW AVERAGE ACTIVE POWER  
The STK15C68 draws significantly less current  
when it is cycled at times longer than 50ns. Figure 2  
shows the relationship between ICC and READ cycle  
time. Worst-case current consumption is shown for  
both CMOS and TTL input levels (commercial tem-  
perature range, VCC= 5.5V, 100% duty cycle on chip  
enable). Figure 3 shows the same relationship for  
WRITE cycles. If the chip enable duty cycle is less  
than 100%, only standby current is drawn when the  
chip is disabled. The overall average current drawn  
by the STK15C68 depends on the following items:  
1) CMOS vs. TTL input levels; 2) the duty cycle of  
chip enable; 3) the overall cycle rate for accesses;  
4) the ratio of READs to WRITEs; 5) the operating  
temperature; 6) the VCC level; and 7) I/O loading.  
In order to prevent unneeded STORE operations,  
automatic STORE will be ignored unless at least  
one WRITE operation has taken place since the  
most recent STORE or RECALL cycle. Software-  
initiated STORE cycles are performed regardless of  
whether a WRITE operation has taken place.  
POWER-UP RECALL  
During power up, or after any low-power condition  
(VCC < VRESET), an internal RECALL request will be  
latched. When VCC once again exceeds the sense  
voltage of VSWITCH, a RECALL cycle will automatically  
be initiated and will take tRESTORE to complete.  
100  
80  
100  
80  
60  
60  
TTL  
CMOS  
40  
40  
TTL  
20  
20  
CMOS  
200  
0
0
50  
100  
150  
50  
100  
150  
200  
Cycle Time (ns)  
Cycle Time (ns)  
Figure 2: I (max) Reads  
Figure 3: I (max) Writes  
CC  
CC  
March 2006  
8
Document Control # ML0009 rev 0.2