Preliminary
STK14EC8
HARDWARE STORE CYCLE
SYMBOLS
STK14EC8
PARAMETER
UNITS NOTES
Standard
Alternate
MIN
1
MAX
31
1
t
t
Hardware STORE to SRAM Disabled
Hardware STORE Pulse Width
70
μs
m
DELAY
HLQZ
32
2
t
15
ns
HLHX
Note m: On a hardware STORE initiation, SRAM operation continues to be enabled for time tDELAY to allow read/write cycles to complete
HARDWARE STORE CYCLE
32
tHLHX
HSB (IN)
23
tSTORE
HSB (OUT)
31
tDELAY
SRAM Enabled
DQ (DATA OUT)
SRAM Enabled
Soft Sequence Commands
NO.
SYMBOLS
PARAMETER
STK14EC8
MIN
UNITS NOTES
Standard
MAX
33
t
Soft Sequence Processing Time
70
μs
n,o
SS
Note n: This is the amount of time that it takes to take action on a soft sequence command. Vcc power must remain high to effectively register
command.
Note o: Commands like Store and Recall lock out I/O until operation is complete which further increases this time. See specific command.
33
tSS
33
tSS
Soft Sequence Command
Soft Sequence Command
ADDRESS #1
ADDRESS #1
ADDRESS #6
ADDRESS #6
ADDRESS
Vcc
Rev 1.0
Document Control #ML0060
April, 2007
9
Simtek Confidential