STK14D88
MODE SELECTION
E
W
G
A -A
Mode
I/O
Power
Notes
13
0
H
L
L
X
H
L
X
L
X
X
X
Not Selected
Read SRAM
Write SRAM
Output High Z
Output Data
Input Data
Standby
Active
X
Active
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x03F8
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
q,r,s
q,r,s
q,r,s
q,r,s
L
L
L
H
H
H
H
L
L
L
L
Active
AutoStore Disable
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x07F0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Active
Active
AutoStore Enable
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0FC0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile Store
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
I
CC2
0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0C63
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
L
Active
Nonvolatile Recall
Notes
q: The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
r: While there are 15 addresses on the STK14D88, only the lower 14 are used to control software modes
s: I/O state depends on the state of G. The I/O table shown assumes G low
Rev 1.7
Document Control #ML0033
February 2007
10