STK14C88
• Power up boot firmware routines should rewrite
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, VCC = 5.5V, 100% duty cycle on chip
enable). Figure 4 shows the same relationship for
WRITE cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK14C88 depends on the following items:
1) CMOS vs. TTL input levels; 2) the duty cycle of
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of READs to WRITEs; 5) the operating
temperature; 6) the Vcc level; and 7) I/O loading.
the nvSRAM into the desired state (autostore
enabled, etc.). While the nvSRAM is shipped in a
preset state, best practice is to again rewrite the
nvSRAM into the desired state as a safeguard
against events that might flip the bit inadvertently
(program bugs, incoming inspection routines,
etc.).
• The Vcap value specified in this datasheet
includes a minimum and a maximum value size.
Best practice is to meet this requirement and not
exceed the max Vcap value because the nvSRAM
internal algorithm calculates Vcap charge time
based on this max Vcap value. Customers that
want to use a larger Vcap value to make sure
there is extra store charge and store time should
discuss their Vcap size selection with Simtek to
understand any impact on the Vcap voltage level
at the end of a tRECALL period.
100
80
60
PREVENTING STORES
40
The STORE function can be disabled on the fly by
holding HSB high with a driver capable of sourcing
30mA at a VOH of at least 2.2V, as it will have to over-
power the internal pull-down device that drives HSB
low for 20μs at the onset of a STORE. When the
STK14C88 is connected for AutoStore operation
(system VCC connected to VCC and a 68μF capacitor
on VCAP) and VCC crosses VSWITCH on the way down,
the STK14C88 will attempt to pull HSB low; if HSB
doesn’t actually get below VIL, the part will stop try-
ing to pull HSB low and abort the STORE attempt.
TTL
20
CMOS
150 200
0
50
100
Cycle Time (ns)
Figure 3: Icc (max) Reads
100
80
HARDWARE PROTECT
The STK14C88 offers hardware protection against
inadvertent STORE operation and SRAM WRITEs dur-
ing low-voltage conditions. When VCAP < VSWITCH, all
externally initiated STORE operations and SRAM
WRITEs will be inhibited.
60
TTL
40
20
CMOS
AutoStore can be completely disabled by tying VCC
to ground and applying + 5V to VCAP. This is the
AutoStore Inhibit mode; in this mode STOREs are only
initiated by explicit request using either the software
sequence or the HSB pin.
0
50
100
150
200
Cycle Time (ns)
LOW AVERAGE ACTIVE POWER
Figure 4: Icc (max) Writes
The STK14C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 3
shows the relationship between ICC and READ cycle
Rev 2.0
Document Control #ML0014
Feb, 2008
12
SIMTEK [ SIMTEK CORPORATION ]
