STK14C88-3
SOFTWARE STORE/RECALL MODE SELECTION
E
W
A
- A (hex)
0
MODE
I/O
POWER
NOTES
13
0E38
31C7
03E0
3C1F
303F
0FC0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
l
L
H
r, s, t
Nonvolatile STORE
CC
2
0E38
31C7
03E0
3C1F
303F
0C63
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
r, s, t
L
H
Active
Nonvolatile RECALL
v
e
SOFTWARE-CONTROLLED STORE/RECALL CYCLE
(V = 3V - 3.6V)
CC
STK14C88-3-
35
STK14C88-3-
45
SYMBOLS
NO.
PARAMETER
UNITS NOTES
Standard Alternate
MIN
35
0
MAX
MIN
45
0
MAX
33
34
35
36
37
t
t
t
t
t
t
t
t
STORE/RECALL Initiation Cycle Time
Address Set-up Time
Clock Pulse Width
ns
ns
ns
ns
μs
n
u
u
u
AVAV
RC
AS
AVEL
25
20
30
20
ELEH
ELAX
RECALL
CW
Address Hold Time
RECALL Duration
20
20
Note r: The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
Note s: While there are 15 addresses on the STK14C88-3, only the lower 14 are used to control software modes.
Note t: I/O state assumes G < VIL. Activation of nonvolatile cycles does not depend on state of G.
Note u: The software sequence is clocked with E controlled READs.
Note v: The six consecutive addresses must be in the order listed in the Hardware Mode Selection Table: (0E38, 31C7, 03E0, 3C1F, 303F, 0FC0) for
a STORE cycle or (0E38, 31C7, 03E0, 3C1F, 303F, 0C63) for a RECALL cycle. W must be high during all six consecutive cycles.
v
SOFTWARE STORE/RECALL CYCLE: E CONTROLLED
33
AVAV
33
t
AVAV
t
ADDRESS #1
ADDRESS #6
ADDRESS
34
AVEL
35
t
ELEH
t
E
36
ELAX
t
28
37
RECALL
t
STORE / t
HIGH IMPEDANCE
DATA VALID
DATA VALID
DQ (DATA
Rev 0.6
Document Control #ML0015
February 2007
9