Si8440/41/42/45
Table 13. Enable Input Truth Table1
Operation
1,2
1,2
P/N
EN1
EN2
H
L
Si8440
—
—
H
L
Outputs B1, B2, B3, B4 are enabled and follow the input state.
Outputs B1, B2, B3, B4 are disabled and Logic Low or in high impedance state.
Output A4 enabled and follows the input state.
3
Si8441
Si8442
Si8445
X
3
X
Output A4 disabled and Logic Low or in high impedance state.
X
H
L
Outputs B1, B2, B3 are enabled and follow the input state.
3
X
Outputs B1, B2, B3 are disabled and Logic Low or in high impedance state.
H
L
X
Outputs A3 and A4 are enabled and follow the input state.
3
X
Outputs A3 and A4 are disabled and Logic Low or in high impedance state.
X
H
L
Outputs B1 and B2 are enabled and follow the input state.
3
X
Outputs B1 and B2 are disabled and Logic Low or in high impedance state.
—
—
Outputs B1, B2, B3, B4 are enabled and follow the input state.
Notes:
1. Enable inputs EN1 and EN2 can be used for multiplexing, for clock sync, or other output control. EN1, EN2 logic
operation is summarized for each isolator product in Table 13. These inputs are internally pulled-up to local VDD by a
3 µA current source allowing them to be connected to an external logic level (high or low) or left floating. To minimize
noise coupling, do not connect circuit traces to EN1 or EN2 if they are left floating. If EN1, EN2 are unused, it is
recommended they be connected to an external logic level, especially if the Si84xx is operating in a noisy environment.
2. X = not applicable; H = Logic High; L = Logic Low.
3. When using the enable pin (EN) function, the output pin state is driven to a logic low state when the EN pin is disabled
(EN = 0) in Revision C. Revision D outputs go into a high-impedance state when the EN pin is disabled (EN = 0). See
"3. Errata and Design Migration Guidelines" on page 25 for more details.
Rev. 1.5
21
SILICONIMAGE [ Silicon image ]
