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EFM32ZG108F32-QFN24 参数 Datasheet PDF下载

EFM32ZG108F32-QFN24图片预览
型号: EFM32ZG108F32-QFN24
PDF下载: 下载PDF文件 查看货源
内容描述: 能源,煤气,水及智能电表 [Energy, gas, water and smart metering]
分类和应用:
文件页数/大小: 51 页 / 1151 K
品牌: SILICONIMAGE [ Silicon image ]
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Preliminary  
...the world's most energy friendly microcontrollers  
QFN24 Pin#  
and Name  
Pin Alternate Functionality / Description  
Pin Name  
Analog  
Timers  
Communication  
Other  
LEU0_RX #4  
I2C0_SDA #0  
PRS_CH0 #0  
GPIO_EM4WU0  
1
2
3
PA0  
IOVDD_0  
PC0  
TIM0_CC0 #0/1/4  
Digital IO power supply 0.  
ACMP0_CH0  
TIM0_CC1 #4  
PCNT0_S0IN #2  
US1_TX #0  
I2C0_SDA #4  
PRS_CH2 #0  
PRS_CH3 #0  
TIM0_CC2 #4  
PCNT0_S1IN #2  
US1_RX #0  
I2C0_SCL #4  
4
PC1  
ACMP0_CH1  
5
6
PB7  
PB8  
LFXTAL_P  
LFXTAL_N  
TIM1_CC0 #3  
TIM1_CC1 #3  
US1_CLK #0  
US1_CS #0  
Reset input, active low.  
7
RESETn  
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up en-  
sure that reset is released.  
8
PB11  
AVDD_2  
PB13  
TIM1_CC2 #3  
9
Analog power supply 2.  
10  
11  
12  
HFXTAL_P  
HFXTAL_N  
LEU0_TX #1  
LEU0_RX #1  
PB14  
AVDD_0  
Analog power supply 0.  
TIM1_CC0 #4  
PCNT0_S0IN #3  
US1_RX #2/3  
I2C0_SDA #1  
13  
14  
PD6  
PD7  
ACMP0_O #2  
CMU_CLK0 #2  
TIM1_CC1 #4  
PCNT0_S1IN #3  
US1_TX #2/3  
I2C0_SCL #1  
15  
16  
VDD_DREG  
DECOUPLE  
Power supply for on-chip voltage regulator.  
Decouple output for on-chip voltage regulator. An external capacitance of size CDECOUPLE is required at this pin.  
TIM1_CC1 #0  
17  
18  
PC14  
PC15  
US1_CS #3  
PRS_CH0 #2  
PCNT0_S1IN #0  
TIM1_CC2 #0  
US1_CLK #3  
PRS_CH1 #2  
US1_CLK #2  
LEU0_TX #3  
I2C0_SDA #5  
DBG_SWCLK #0  
BOOT_TX  
19  
20  
PF0  
PF1  
TIM0_CC0 #5  
US1_CS #2  
LEU0_RX #3  
I2C0_SCL #5  
DBG_SWDIO #0  
GPIO_EM4WU3  
BOOT_RX  
TIM0_CC1 #5  
TIM0_CC2 #5  
21  
22  
23  
PF2  
IOVDD_5  
PE12  
LEU0_TX #4  
GPIO_EM4WU4  
Digital IO power supply 5.  
TIM1_CC2 #1  
I2C0_SDA #6  
I2C0_SCL #6  
CMU_CLK1 #2  
ACMP0_O #0  
GPIO_EM4WU5  
24  
PE13  
4.2 Alternate Functionality Pinout  
A wide selection of alternate functionality is available for multiplexing to various pins. This is shown in  
Table 4.2 (p. 36). The table shows the name of the alternate functionality in the first column, followed  
by columns showing the possible LOCATION bitfield settings.  
Note  
Some functionality, such as analog interfaces, do not have alternate settings or a LOCA-  
TION bitfield. In these cases, the pinout is shown in the column corresponding to LOCA-  
TION 0.  
www.silabs.com  
2013-10-09 - EFM32ZG108FXX - d0063_Rev0.60  
35  
 
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