Si3056
Si3018/19/10
line data. The host processor must detect the
presence of this tone.
2. The DAA must then check for another parallel device
on the same line. This is accomplished by briefly
going on-hook, measuring the line voltage, and then
returning to an off-hook state.
f. Set the OH bit to 1 (or drive the OFHK pin to the
active state) to return to an off-hook state. After
returning to an off-hook state and waiting 8 ms
for the off-hook counter, normal data
transmission and reception can proceed. If a
non-compliant parallel device is present, then a
reply tone is not sent by the host tone generator
and the CO does not proceed with sending the
CID data. If all devices on the line are Type II CID
compliant, then the host must mute its upstream
data output to avoid propagation of its reply tone
and the subsequent CID data. After muting its
upstream data output, the host processor should
then return an acknowledgement (ACK) tone to
the CO to request the transmission of the CID
data.
a. Set the CALD bit (Register 17, bit 5) to disable
the calibration that automatically occurs when
going off-hook.
b. Set the RCALD bit (Register 25, bit 5) to disable
the resistor calibration from occurring when
going off-hook.
c. Set the FOH[1:0] bits (Register 31, bits 6:5) to 11
to reduce the off-hook counter time to 8 ms.
d. Clear the OH bit (or drive the OFHK pin to the
inactive state) to put the DAA in an on-hook
state. The RXM bit (Register 19, bit 3) may also
be set to mute the receive path.
3. The CO then responds with the CID data and the
host processor unmutes the upstream data output
and continues with normal operation.
e. Read the LVS bits to determine the state of the
4. The muting of the upstream data path by the host
processor mutes the handset in a telephone
application so the user cannot hear the
line.
If the LVS bits read the typical on-hook line
voltage, then no parallel devices are active on
the line and CID data reception can be
continued.
acknowledgement tone and CID data being sent.
5. The CALD and RCALD bits can be cleared to re-
enable the automatic calibration when going off-
hook. The FOH[1:0] bits also can be programmed to
01 to restore the default off-hook counter time.
Because of the nature of the low-power ADC, the data
presented on SDO could have up to a 10% dc offset.
The caller ID decoder must either use a high pass or a
band pass filter to accurately retrieve the caller ID data.
If the LVS bits read well below the typical on-
hook line voltage, then one or more devices are
present and active on the same line that are not
compliant with Type II CID. Do not continue CID
data reception.
Rev. 1.05
33
SILICON [ SILICON ]
