Si1000/1/2/3/4/5
1,2
SFR Definition 14.1. PMU0CF: Power Management Unit Configuration
Bit
7
6
5
4
3
2
1
0
SLEEP SUSPEND
CLEAR
RSTWK RTCFWK RTCAWK PMATWK CPT0WK
Name
Type
Reset
W
0
W
0
W
0
R
R/W
R/W
R/W
R/W
Varies
Varies
Varies
Varies
Varies
SFR Page = 0x0; SFR Address = 0xB5
Bit
Name
Description
Write
Read
7
SLEEP
Sleep Mode Select
Writing 1 places the
device in Sleep Mode.
N/A
N/A
6
5
4
3
SUSPEND Suspend Mode Select
Writing 1 places the
device in Suspend Mode.
CLEAR
RSTWK
Wake-up Flag Clear
Writing 1 clears all wake- N/A
up flags.
Reset Pin Wake-up Flag N/A
Set to 1 if a falling edge has
been detected on RST.
RTCFWK SmaRTClock Oscillator
Fail Wake-up Source
0: Disable wake-up on
SmaRTClock Osc. Fail.
1: Enable wake-up on
SmaRTClock Osc. Fail.
Set to 1 if the SmaRTClock
Oscillator has failed.
Enable and Flag
2
RTCAWK SmaRTClock Alarm
0: Disable wake-up on
Set to 1 if a SmaRTClock
Alarm has occurred.
Wake-up Source Enable SmaRTClock Alarm.
and Flag
1: Enable wake-up on
SmaRTClock Alarm.
1
PMATWK Port Match Wake-up
0: Disable wake-up on
Set to 1 if a Port Match
Event has occurred.
Source Enable and Flag Port Match Event.
1: Enable wake-up on
Port Match Event.
0
CPT0WK Comparator0 Wake-up
0: Disable wake-up on
Set to 1 if Comparator0 ris-
Source Enable and Flag Comparator0 rising edge. ing edge has occurred.
1: Enable wake-up on
Comparator0 rising edge.
Notes:
1. Read-modify-write operations (ORL, ANL, etc.) should not be used on this register. Wake-up sources must be
re-enabled each time the SLEEP or SUSPEND bits are written to 1.
2. The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep
Mode if any wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after
each wake-up from Suspend or Sleep Modes.
156
Rev. 1.0
SILICON [ SILICON ]
