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SI1005-C-GM 参数 Datasheet PDF下载

SI1005-C-GM图片预览
型号: SI1005-C-GM
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗, 64/32 KB , 10位ADC, MCU ,集成了240-960兆赫的EZRadioPRO收发器 [Ultra Low Power, 64/32 kB, 10-Bit ADC MCU with Integrated 240-960 MHz EZRadioPRO Transceiver]
分类和应用:
文件页数/大小: 376 页 / 2369 K
品牌: SILICON [ SILICON ]
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Si1000/1/2/3/4/5  
SFR Definition 27.1. CKCON: Clock Control  
Bit  
7
T3MH  
R/W  
0
6
T3ML  
R/W  
0
5
T2MH  
R/W  
0
4
T2ML  
R/W  
0
3
2
1
0
Name  
Type  
Reset  
T1M  
R/W  
0
T0M  
R/W  
0
SCA[1:0]  
R/W  
0
0
SFR Page = 0x0; SFR Address = 0x8E  
Bit  
Name  
Function  
7
T3MH Timer 3 High Byte Clock Select.  
Selects the clock supplied to the Timer 3 high byte (split 8-bit timer mode only).  
0: Timer 3 high byte uses the clock defined by the T3XCLK bit in TMR3CN.  
1: Timer 3 high byte uses the system clock.  
6
T3ML  
Timer 3 Low Byte Clock Select.  
Selects the clock supplied to Timer 3. Selects the clock supplied to the lower 8-bit timer  
in split 8-bit timer mode.  
0: Timer 3 low byte uses the clock defined by the T3XCLK bit in TMR3CN.  
1: Timer 3 low byte uses the system clock.  
5
4
T2MH Timer 2 High Byte Clock Select.  
Selects the clock supplied to the Timer 2 high byte (split 8-bit timer mode only).  
0: Timer 2 high byte uses the clock defined by the T2XCLK bit in TMR2CN.  
1: Timer 2 high byte uses the system clock.  
T2ML  
Timer 2 Low Byte Clock Select.  
Selects the clock supplied to Timer 2. If Timer 2 is configured in split 8-bit timer mode,  
this bit selects the clock supplied to the lower 8-bit timer.  
0: Timer 2 low byte uses the clock defined by the T2XCLK bit in TMR2CN.  
1: Timer 2 low byte uses the system clock.  
3
2
T1M  
T0M  
Timer 1 Clock Select.  
Selects the clock source supplied to Timer 1. Ignored when C/T1 is set to 1.  
0: Timer 1 uses the clock defined by the prescale bits SCA[1:0].  
1: Timer 1 uses the system clock.  
Timer 0 Clock Select.  
Selects the clock source supplied to Timer 0. Ignored when C/T0 is set to 1.  
0: Counter/Timer 0 uses the clock defined by the prescale bits SCA[1:0].  
1: Counter/Timer 0 uses the system clock.  
1:0 SCA[1:0] Timer 0/1 Prescale Bits.  
These bits control the Timer 0/1 Clock Prescaler:  
00: System clock divided by 12  
01: System clock divided by 4  
10: System clock divided by 48  
11: External clock divided by 8 (synchronized with the system clock)  
Rev. 1.0  
331