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SI1005-C-GM 参数 Datasheet PDF下载

SI1005-C-GM图片预览
型号: SI1005-C-GM
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗, 64/32 KB , 10位ADC, MCU ,集成了240-960兆赫的EZRadioPRO收发器 [Ultra Low Power, 64/32 kB, 10-Bit ADC MCU with Integrated 240-960 MHz EZRadioPRO Transceiver]
分类和应用:
文件页数/大小: 376 页 / 2369 K
品牌: SILICON [ SILICON ]
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Si1000/1/2/3/4/5  
SFR Definition 15.1. CRC0CN: CRC0 Control  
Bit  
7
6
5
4
3
2
1
0
CRC0SEL CRC0INIT CRC0VAL  
CRC0PNT[1:0]  
R/W  
Name  
Type  
Reset  
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
0
0
SFR Page = 0xF; SFR Address = 0x92  
Bit  
7:5  
4
Name  
Function  
Unused  
Read = 000b; Write = Don’t Care.  
CRC0SEL  
CRC0 Polynomial Select Bit.  
This bit selects the CRC0 polynomial and result length (32-bit or 16-bit).  
0: CRC0 uses the 32-bit polynomial 0x04C11DB7 for calculating the CRC result.  
1: CRC0 uses the 16-bit polynomial 0x1021 for calculating the CRC result.  
3
2
CRC0INIT  
CRC0VAL  
CRC0 Result Initialization Bit.  
Writing a 1 to this bit initializes the entire CRC result based on CRC0VAL.  
CRC0 Set Value Initialization Bit.  
This bit selects the set value of the CRC result.  
0: CRC result is set to 0x00000000 on write of 1 to CRC0INIT.  
1: CRC result is set to 0xFFFFFFFF on write of 1 to CRC0INIT.  
1:0 CRC0PNT[1:0] CRC0 Result Pointer.  
Specifies the byte of the CRC result to be read/written on the next access to  
CRC0DAT. The value of these bits will auto-increment upon each read or write.  
For CRC0SEL = 0:  
00: CRC0DAT accesses bits 7–0 of the 32-bit CRC result.  
01: CRC0DAT accesses bits 15–8 of the 32-bit CRC result.  
10: CRC0DAT accesses bits 23–16 of the 32-bit CRC result.  
11: CRC0DAT accesses bits 31–24 of the 32-bit CRC result.  
For CRC0SEL = 1:  
00: CRC0DAT accesses bits 7–0 of the 16-bit CRC result.  
01: CRC0DAT accesses bits 15–8 of the 16-bit CRC result.  
10: CRC0DAT accesses bits 7–0 of the 16-bit CRC result.  
11: CRC0DAT accesses bits 15–8 of the 16-bit CRC result.  
Note: Upon initiation of an automatic CRC calculation, the third opcode byte fetched from program memory is  
indeterminate. Therefore, writes to CRC0CN that initiate a CRC operation must be immediately followed by a  
benign 3-byte instruction whose third byte is a don’t care. An example of such an instruction is a 3-byte MOV  
that targets the CRC0FLIP register. When programming in ‘C’, the dummy value written to CRC0FLIP should  
be a non-zero value to prevent the compiler from generating a 2-byte MOV instruction.  
Rev. 1.0  
161