Si1000/1/2/3/4/5
7.3. Comparator Response Time
Comparator response time may be configured in software via the CPTnMD registers described on
“CPT0MD: Comparator 0 Mode Selection” on page 103 and “CPT1MD: Comparator 1 Mode Selection” on
page 105. Four response time settings are available: Mode 0 (Fastest Response Time), Mode 1, Mode 2,
and Mode 3 (Lowest Power). Selecting a longer response time reduces the Comparator active supply cur-
rent. The Comparators also have low power shutdown state, which is entered any time the comparator is
disabled. Comparator rising edge and falling edge response times are typically not equal. See Table 4.13
on page 63 for complete comparator timing and supply current specifications.
7.4. Comparator Hysteresis
The Comparators feature software-programmable hysteresis that can be used to stabilize the comparator
output while a transition is occurring on the input. Using the CPTnCN registers, the user can program both
the amount of hysteresis voltage (referred to the input voltage) and the positive and negative-going sym-
metry of this hysteresis around the threshold voltage (i.e., the comparator negative input).
Figure 7.3 shows that when positive hysteresis is enabled, the comparator output does not transition from
logic 0 to logic 1 until the comparator positive input voltage has exceeded the threshold voltage by an
amount equal to the programmed hysteresis. It also shows that when negative hysteresis is enabled, the
comparator output does not transition from logic 1 to logic 0 until the comparator positive input voltage has
fallen below the threshold voltage by an amount equal to the programmed hysteresis.
The amount of positive hysteresis is determined by the settings of the CPnHYP bits in the CPTnCN regis-
ter and the amount of negative hysteresis voltage is determined by the settings of the CPnHYN bits in the
same register. Settings of 20, 10, 5, or 0 mV can be programmed for both positive and negative hysteresis.
See Section “Table 4.13. Comparator Electrical Characteristics” on page 63 for complete comparator hys-
teresis specifications.
CPn+
VIN+
VIN-
+
CPn
_
OUT
CPn-
CIRCUIT CONFIGURATION
Positive Hysteresis Voltage
(Programmed with CP0HYP Bits)
VIN-
Negative Hysteresis Voltage
(Programmed by CP0HYN Bits)
INPUTS
VIN+
VOH
OUTPUT
VOL
Negative Hysteresis
Disabled
Maximum
Negative Hysteresis
Positive Hysteresis
Disabled
Maximum
Positive Hysteresis
Figure 7.3. Comparator Hysteresis Plot
Rev. 1.0
101
SILICON [ SILICON ]
