EFM32G Data Sheet
Pin Definitions
QFN64 Pin# and Name
Pin Alternate Functionality / Description
Pin #
6
Pin Name
PA5
Analog
Timers
TIM0_CDTI2 #0
Communication
LEU1_TX #1
Other
6
PA6
LEU1_RX #1
8
IOVDD_0
PC0
Digital IO power supply 0.
PCNT0_S0IN #1
9
US1_TX #0
US1_RX #0
US2_CLK #0
US2_CS #0
10
11
12
PC1
PCNT0_S1IN #1
PC2
PC3
LETIM0_OUT0 #3
PCNT1_S0IN #0
13
14
PC4
PC5
ACMP0_CH4
ACMP0_CH5
US2_CLK #0
US2_CS #0
LETIM0_OUT1 #3
PCNT1_S1IN #0
15
16
17
18
19
PB7
PB8
PA8
PA9
PA10
LFXTAL_P
LFXTAL_N
US1_CLK #0
US1_CS #0
TIM2_CC0 #0
TIM2_CC1 #0
TIM2_CC2 #0
Reset input, active low.To apply an external reset source to this pin, it is required to only drive this pin low
during reset, and let the internal pull-up ensure that reset is released.
20
RESETn
21
22
23
24
25
26
27
28
PB11
PB12
DAC0_OUT0
DAC0_OUT1
LETIM0_OUT0 #1
LETIM0_OUT1 #1
AVDD_1
PB13
Analog power supply 1.
HFXTAL_P
LEU0_TX #1
LEU0_RX #1
PB14
HFXTAL_N
IOVDD_3
AVDD_0
PD0
Digital IO power supply 3.
Analog power supply 0.
ADC0_CH0
ADC0_CH1
PCNT2_S0IN #0
US1_TX #1
US1_RX #1
TIM0_CC0 #3 PCNT2_S1IN
#0
29
PD1
30
31
32
33
34
35
36
37
38
39
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PC6
PC7
ADC0_CH2
ADC0_CH3
ADC0_CH4
ADC0_CH5
ADC0_CH6
ADC0_CH7
TIM0_CC1 #3
TIM0_CC2 #3
US1_CLK #1
US1_CS #1
LEU0_TX #0
LEU0_RX #0
I2C0_SDA #1
I2C0_SCL #1
LETIM0_OUT0 #0
LETIM0_OUT1 #0
CMU_CLK1 #1
ACMP0_CH6
ACMP0_CH7
LEU1_TX #0 I2C0_SDA #2
LEU1_RX #0 I2C0_SCL #2
VDD_DREG Power supply for on-chip voltage regulator.
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