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C8051F502-IM 参数 Datasheet PDF下载

C8051F502-IM图片预览
型号: C8051F502-IM
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路PC时钟
文件页数/大小: 312 页 / 2813 K
品牌: SILICON [ SILICON ]
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C8051F50x-F51x  
Figure 4.2. QFP-48 Landing Diagram  
Table 4.2. QFP-48 Landing Diagram Dimensions  
Dimension  
Min  
8.30  
8.30  
Max  
8.40  
8.40  
Dimension  
Min  
0.20  
1.40  
Max  
0.30  
1.50  
C1  
X1  
C2  
E
Y1  
0.50 BSC  
Notes:  
General  
1. All dimensions shown are in millimeters (mm) unless otherwise noted.  
2. This Land Pattern Design is based on the IPC-7351 guidelines.  
Solder Mask Design  
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the  
metal pad is to be 60m minimum, all the way around the pad.  
Stencil Design  
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure  
good solder paste release.  
5. The stencil thickness should be 0.125mm (5 mils).  
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.  
Card Assembly  
7. A No-Clean, Type-3 solder paste is recommended.  
8. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body  
Components.  
Rev. 1.1  
31  
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