C8051F50x-F51x
SFR Definition 26.13. TMR3CN: Timer 3 Control
Bit
7
6
5
4
3
2
1
0
TF3H
TF3L
TF3LEN
TF3CEN T3SPLIT
TR3
T3XCLK
Name
Type
Reset
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R
0
R/W
0
SFR Address = 0x91; SFR Page = 0x00
Bit
Name
Function
7
TF3H
Timer 3 High Byte Overflow Flag.
Set by hardware when the Timer 3 high byte overflows from 0xFF to 0x00. In 16 bit
mode, this will occur when Timer 3 overflows from 0xFFFF to 0x0000. When the
Timer 3 interrupt is enabled, setting this bit causes the CPU to vector to the Timer 3
interrupt service routine. This bit is not automatically cleared by hardware.
6
TF3L
Timer 3 Low Byte Overflow Flag.
Set by hardware when the Timer 3 low byte overflows from 0xFF to 0x00. TF3L will
be set when the low byte overflows regardless of the Timer 3 mode. This bit is not
automatically cleared by hardware.
5
4
3
TF3LEN
TF3CEN
Timer 3 Low Byte Interrupt Enable.
When set to 1, this bit enables Timer 3 Low Byte interrupts. If Timer 3 interrupts are
also enabled, an interrupt will be generated when the low byte of Timer 3 overflows.
Timer 3 Capture Mode Enable.
0: Timer 3 Capture Mode is disabled.
1: Timer 3 Capture Mode is enabled.
T3SPLIT Timer 3 Split Mode Enable.
When this bit is set, Timer 3 operates as two 8-bit timers with auto-reload.
0: Timer 3 operates in 16-bit auto-reload mode.
1: Timer 3 operates as two 8-bit auto-reload timers.
2
TR3
Timer 3 Run Control.
Timer 3 is enabled by setting this bit to 1. In 8-bit mode, this bit enables/disables
TMR3H only; TMR3L is always enabled in split mode.
1
0
Unused
T3XCLK
Read = 0b; Write = Don’t Care
Timer 3 External Clock Select.
This bit selects the external clock source for Timer 3. If Timer 3 is in 8-bit mode, this
bit selects the external oscillator clock source for both timer bytes. However, the
Timer 3 Clock Select bits (T3MH and T3ML in register CKCON) may still be used to
select between the external clock and the system clock for either timer.
0: Timer 3 clock is the system clock divided by 12.
1: Timer 3 clock is the external clock divided by 8 (synchronized with SYSCLK).
284
Rev. 1.1
SILICON [ SILICON ]
