C8051F50x-F51x
SFR Definition 15.3. FLSCL: Flash Scale
Bit
7
6
5
4
FLRT
R/W
0
3
2
1
FLEWT
R/W
0
0
Reserved
R/W
Name Reserved Reserved Reserved
Reserved Reserved
Type
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Reset
0
SFR Address = 0xB6; SFR Page = All Pages
Bit Name
7:5 Reserved Must Write 000b.
FLRT Flash Read Time Control.
Function
4
This bit should be programmed to the smallest allowed value, according to the system
clock speed.
0: SYSCLK < 25 MHz (Flash read strobe is one system clock).
1: SYSCLK > 25 MHz (Flash read strobe is two system clocks).
3:2 Reserved Must Write 00b.
1
FLEWT
Flash Erase Write Time Control.
This bit should be set to 1b before Writing or Erasing Flash.
0: Short Flash Erase / Write Timing.
1: Extended Flash Erase / Write Timing.
0
Reserved Must Write 0b.
136
Rev. 1.1
SILICON [ SILICON ]
