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C8051F339 参数 Datasheet PDF下载

C8051F339图片预览
型号: C8051F339
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
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C8051F336/7/8/9  
Notes on Registers, Operands and Addressing Modes:  
Rn - Register R0–R7 of the currently selected register bank.  
@Ri - Data RAM location addressed indirectly through R0 or R1.  
rel - 8-bit, signed (two’s complement) offset relative to the first byte of the following instruction. Used by  
SJMP and all conditional jumps.  
direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00–  
0x7F) or an SFR (0x80–0xFF).  
#data - 8-bit constant  
#data16 - 16-bit constant  
bit - Direct-accessed bit in Data RAM or SFR  
addr11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same  
2 kB page of program memory as the first byte of the following instruction.  
addr16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within  
the 8 kB program memory space.  
There is one unused opcode (0xA5) that performs the same function as NOP.  
All mnemonics copyrighted © Intel Corporation 1980.  
Rev. 0.2  
77  
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