欢迎访问ic37.com |
会员登录 免费注册
发布采购

C8051F339 参数 Datasheet PDF下载

C8051F339图片预览
型号: C8051F339
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
 浏览型号C8051F339的Datasheet PDF文件第205页浏览型号C8051F339的Datasheet PDF文件第206页浏览型号C8051F339的Datasheet PDF文件第207页浏览型号C8051F339的Datasheet PDF文件第208页浏览型号C8051F339的Datasheet PDF文件第210页浏览型号C8051F339的Datasheet PDF文件第211页浏览型号C8051F339的Datasheet PDF文件第212页浏览型号C8051F339的Datasheet PDF文件第213页  
C8051F336/7/8/9  
25. Programmable Counter Array  
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU  
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer  
and three 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line  
(CEXn) which is routed through the Crossbar to Port I/O when enabled. The counter/timer is driven by a  
programmable timebase that can select between six sources: system clock, system clock divided by four,  
system clock divided by twelve, the external oscillator clock source divided by 8, Timer 0 overflows, or an  
external clock signal on the ECI input pin. Each capture/compare module may be configured to operate  
independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Fre-  
quency Output,  
8 to 11-Bit PWM, or 16-Bit PWM (each mode is described in Section  
“25.3. Capture/Compare Modules” on page 212). The external oscillator clock option is ideal for real-time  
clock (RTC) functionality, allowing the PCA to be clocked by a precision external oscillator while the inter-  
nal oscillator drives the system clock. The PCA is configured and controlled through the system controller's  
Special Function Registers. The PCA block diagram is shown in Figure 25.1  
Important Note: The PCA Module 2 may be used as a watchdog timer (WDT), and is enabled in this mode  
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled.  
See Section 25.4 for details.  
SYSCLK/12  
SYSCLK/4  
Timer 0 Overflow  
PCA  
16-Bit Counter/Timer  
CLOCK  
MUX  
ECI  
SYSCLK  
External Clock/8  
Capture/Compare  
Module 0  
Capture/Compare  
Module 1  
Capture/Compare  
Module 2 / WDT  
Crossbar  
Port I/O  
Figure 25.1. PCA Block Diagram  
Rev. 0.2  
209