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C8051F339 参数 Datasheet PDF下载

C8051F339图片预览
型号: C8051F339
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
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C8051F336/7/8/9  
24.2. Timer 2  
Timer 2 is a 16-bit timer formed by two 8-bit SFRs: TMR2L (low byte) and TMR2H (high byte). Timer 2 may  
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T2SPLIT bit (TMR2CN.3) defines  
the Timer 2 operation mode.  
Timer 2 may be clocked by the system clock, the system clock divided by 12, or the external oscillator  
source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the  
internal oscillator drives the system clock while Timer 2 (and/or the PCA) is clocked by an external preci-  
sion oscillator. Note that the external oscillator source divided by 8 is synchronized with the system clock.  
24.2.1. 16-bit Timer with Auto-Reload  
When T2SPLIT (TMR2CN.3) is zero, Timer 2 operates as a 16-bit timer with auto-reload. Timer 2 can be  
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the  
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 2  
reload registers (TMR2RLH and TMR2RLL) is loaded into the Timer 2 register as shown in Figure 24.4,  
and the Timer 2 High Byte Overflow Flag (TMR2CN.7) is set. If Timer 2 interrupts are enabled (if IE.5 is  
set), an interrupt will be generated on each Timer 2 overflow. Additionally, if Timer 2 interrupts are enabled  
and the TF2LEN bit is set (TMR2CN.5), an interrupt will be generated each time the lower 8 bits (TMR2L)  
overflow from 0xFF to 0x00.  
CKCON  
T T T T T T S S  
3 3 2 2 1 0 C C  
T2XCLK  
M M M M M M A A  
H L H L  
1 0  
To ADC,  
SMBus  
To SMBus  
TMR2H  
SYSCLK / 12  
0
1
TL2  
Overflow  
0
1
TCLK  
TR2  
TF2H  
TMR2L  
Interrupt  
External Clock / 8  
SYSCLK  
TF2L  
TF2LEN  
TF2CEN  
T2SPLIT  
TR2  
T2XCLK  
TMR2RLL TMR2RLH  
Reload  
Figure 24.4. Timer 2 16-Bit Mode Block Diagram  
Rev. 0.2  
197