欢迎访问ic37.com |
会员登录 免费注册
发布采购

C8051F339 参数 Datasheet PDF下载

C8051F339图片预览
型号: C8051F339
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 234 页 / 3348 K
品牌: SILICON [ SILICON ]
 浏览型号C8051F339的Datasheet PDF文件第12页浏览型号C8051F339的Datasheet PDF文件第13页浏览型号C8051F339的Datasheet PDF文件第14页浏览型号C8051F339的Datasheet PDF文件第15页浏览型号C8051F339的Datasheet PDF文件第17页浏览型号C8051F339的Datasheet PDF文件第18页浏览型号C8051F339的Datasheet PDF文件第19页浏览型号C8051F339的Datasheet PDF文件第20页  
C8051F336/7/8/9  
1. System Overview  
C8051F336/7/8/9 devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted features  
are listed below. Refer to Table 2.1 for specific product feature selection and part ordering numbers.  
High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)  
In-system, full-speed, non-intrusive debug interface (on-chip)  
True 10-bit 200 ksps 20-channel single-ended/differential ADC with analog multiplexer  
10-bit Current Output DAC  
Precision programmable 24.5 MHz internal oscillator  
Low-power, low-frequency oscillator  
16 kB of on-chip Flash memory—512 bytes are reserved  
768 bytes of on-chip RAM  
SMBus/I2C, Enhanced UART, and Enhanced SPI serial interfaces implemented in hardware  
Four general-purpose 16-bit timers  
Programmable Counter/Timer Array (PCA) with three capture/compare modules and Watchdog Timer  
function  
On-chip Power-On Reset, V Monitor, and Temperature Sensor  
On-chip Voltage Comparator  
21 or 17 Port I/O (5 V tolerant)  
Low-power suspend mode with fast wake-up time  
DD  
With on-chip Power-On Reset, V  
monitor, Watchdog Timer, and clock oscillator, the C8051F336/7/8/9  
DD  
devices are truly stand-alone System-on-a-Chip solutions. The Flash memory can be reprogrammed even  
in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User  
software has complete control of all peripherals, and may individually shut down any or all peripherals for  
power savings.  
The on-chip Silicon Labs 2-Wire (C2) Development Interface allows non-intrusive (uses no on-chip  
resources), full speed, in-circuit debugging using the production MCU installed in the final application. This  
debug logic supports inspection and modification of memory and registers, setting breakpoints, single  
stepping, run and halt commands. All analog and digital peripherals are fully functional while debugging  
using C2. The two C2 interface pins can be shared with user functions, allowing in-system debugging with-  
out occupying package pins.  
Each device is specified for 2.7 to 3.6 V operation over the industrial temperature range (–40 to +85 °C).  
The Port I/O and RST pins are tolerant of input signals up to 5 V. The C8051F336/7 are available in a 20-  
pin QFN package and the C8051F338/9 are available in a 24-pin QFN package. Both package options are  
lead-free and RoHS compliant. See Table 2.1 for ordering information. Block diagrams are included in  
Figure 1.1 and Figure 1.2.  
16  
Rev. 0.2