C8051F360/1/2/3/4/5/6/7/8/9
Table 19.7. Timer Settings for Standard Baud Rates Using the PLL
Frequency: 50.0 MHz
1
Target
Baud Rate
(bps)
Baud Rate
% Error
Oscilla- Timer Clock
SCA1-SCA0
Timer 1
Reload
Value (hex)
T1M
1
tor Divide
Factor
Source
(pre-scale select)
2
230400
115200
57600
28800
14400
9600
0.45%
–0.01%
0.45%
–0.01%
0.22%
218
434
872
1736
3480
5208
20832
SYSCLK
SYSCLK
SYSCLK/4
SYSCLK/4
SYSCLK/12
SYSCLK/12
SYSCLK/48
1
1
0
0
0
0
0
0x93
0x27
0x93
0x27
0x6F
0x27
0x27
XX
XX
01
01
00
00
10
–0.01%
–0.01%
2400
Notes:
1. SCA1–SCA0 and T1M bit definitions can be found in Section 21.1.
2. X = Don’t care.
Table 19.8. Timer Settings for Standard Baud Rates Using the PLL
Frequency: 100.0 MHz
1
Target
Baud Rate
(bps)
Baud Rate
% Error
Oscilla- Timer Clock
SCA1-SCA0
Timer 1
Reload
Value (hex)
T1M
1
tor Divide
Factor
Source
(pre-scale select)
2
230400
115200
57600
28800
14400
9600
–0.01%
0.45%
–0.01%
0.22%
–0.47%
0.45%
434
872
1736
3480
6912
10464
SYSCLK
SYSCLK/4
SYSCLK/4
SYSCLK/12
SYSCLK/48
SYSCLK/48
1
0
0
0
0
0
0x27
0x93
0x27
0x6F
0xB8
0x93
XX
01
01
00
10
10
Notes:
1. SCA1–SCA0 and T1M bit definitions can be found in Section 21.1.
2. X = Don’t care.
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