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C8051F363 参数 Datasheet PDF下载

C8051F363图片预览
型号: C8051F363
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 288 页 / 2659 K
品牌: SILICON [ SILICON ]
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C8051F360/1/2/3/4/5/6/7/8/9  
11.6. Rounding and Saturation  
A Rounding Engine is included, which can be used to provide a rounded result when operating on frac-  
tional numbers. MAC0 uses an unbiased rounding algorithm to round the data stored in bits 3116 of the  
accumulator, as shown in Table 11.1. Rounding occurs during the third stage of the MAC0 pipeline, after  
any shift operation, or on a write to the LSB of the accumulator. The rounded results are stored in the  
rounding registers: MAC0RNDH (SFR Definition 11.12) and MAC0RNDL (SFR Definition 11.13). The accu-  
mulator registers are not affected by the rounding engine. Although rounding is primarily used for fractional  
data, the data in the rounding registers is updated in the same way when operating in integer mode.  
Table 11.1. MAC0 Rounding (MAC0SAT = 0)  
Accumulator Bits 15–0  
Accumulator Bits 31–16 Rounding  
Rounded Results  
(MAC0ACC1:MAC0ACC0) (MAC0ACC3:MAC0ACC2) Direction  
(MAC0RNDH:MAC0RNDL)  
Greater Than 0x8000  
Less Than 0x8000  
Equal To 0x8000  
Equal To 0x8000  
Anything  
Up  
(MAC0ACC3:MAC0ACC2) + 1  
(MAC0ACC3:MAC0ACC2)  
(MAC0ACC3:MAC0ACC2) + 1  
(MAC0ACC3:MAC0ACC2)  
Anything  
Down  
Up  
Odd (LSB = 1)  
Even (LSB = 0)  
Down  
The rounding engine can also be used to saturate the results stored in the rounding registers. If the  
MAC0SAT bit is set to ‘1’ and the rounding register overflows, the rounding registers will saturate. When a  
positive overflow occurs, the rounding registers will show a value of 0x7FFF when saturated. For a nega-  
tive overflow, the rounding registers will show a value of 0x8000 when saturated. If the MAC0SAT bit is  
cleared to ‘0’, the rounding registers will not saturate.  
11.7. Usage Examples  
This section details some software examples for using MAC0. Section 11.7.1 shows a series of two MAC  
operations using fractional numbers. Section 11.7.2 shows a single operation in Multiply Only mode with  
integer numbers. The last example, shown in Section 11.7.3, demonstrates how the left-shift and right-shift  
operations can be used to modify the accumulator. All of the examples assume that all of the flags in the  
MAC0STA register are initially set to ‘0’.  
11.7.1. Multiply and Accumulate Example  
The example below implements the equation:  
(0.5 × 0.25) + (0.5 × –0.25) = 0.125 – 0.125 = 0.0  
MOV  
MOV  
MOV  
MOV  
MOV  
MOV  
MOV  
NOP  
NOP  
MAC0CF, #0Ah  
MAC0AH, #40h  
MAC0AL, #00h  
MAC0BH, #20h  
MAC0BL, #00h  
MAC0BH, #E0h  
MAC0BL, #00h  
; Set to Clear Accumulator, Use fractional numbers  
; Load MAC0A register with 4000 hex = 0.5 decimal  
; Load MAC0B register with 2000 hex = 0.25 decimal  
; This line initiates the first MAC operation  
; Load MAC0B register with E000 hex = -0.25 decimal  
; This line initiates the second MAC operation  
; After this instruction, the Accumulator should be equal to 0,  
; and the MAC0STA register should be 0x04, indicating a zero  
; After this instruction, the Rounding register is updated  
NOP  
120  
Rev. 1.0