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C8051F363 参数 Datasheet PDF下载

C8051F363图片预览
型号: C8051F363
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用:
文件页数/大小: 288 页 / 2659 K
品牌: SILICON [ SILICON ]
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C8051F360/1/2/3/4/5/6/7/8/9  
SFR Definition 9.9. ACC: Accumulator  
SFR Page:  
SFR Address: 0xE0  
all pages  
(bit addressable)  
R/W  
R/W  
R/W  
ACC.5  
Bit5  
R/W  
ACC.4  
Bit4  
R/W  
ACC.3  
Bit3  
R/W  
ACC.2  
Bit2  
R/W  
ACC.1  
Bit1  
R/W  
Reset Value  
ACC.7  
Bit7  
ACC.6  
Bit6  
ACC.0 00000000  
Bit0  
Bits 7–0: ACC: Accumulator.  
This register is the accumulator for arithmetic operations.  
SFR Definition 9.10. B: B Register  
SFR Page:  
SFR Address: 0xF0  
all pages  
(bit addressable)  
R/W  
R/W  
B.6  
Bit6  
R/W  
B.5  
Bit5  
R/W  
B.4  
Bit4  
R/W  
B.3  
Bit3  
R/W  
B.2  
Bit2  
R/W  
B.1  
Bit1  
R/W  
B.0  
Bit0  
Reset Value  
B.7  
Bit7  
00000000  
Bits 7–0: B: B Register.  
This register serves as a second accumulator for certain arithmetic operations.  
9.5. Power Management Modes  
The CIP-51 core has two software programmable power management modes: Idle and Stop. Idle mode  
halts the CPU while leaving the external peripherals and internal clocks active. In Stop mode, the CPU is  
halted, all interrupts and timers (except the Missing Clock Detector) are inactive, and the system clock is  
stopped. Since clocks are running in Idle mode, power consumption is dependent upon the system clock  
frequency and the number of peripherals left in active mode before entering Idle. Stop mode consumes the  
least power. SFR Definition 9.11 describes the Power Control Register (PCON) used to control the CIP-  
51's power management modes.  
Although the CIP-51 has Idle and Stop modes built in (as with any standard 8051 architecture), power  
management of the entire MCU is better accomplished by enabling/disabling individual peripherals as  
needed. Each analog peripheral can be disabled when not in use and put into low power mode. Digital  
peripherals, such as timers or serial buses, draw little power whenever they are not in use. Turning off the  
Flash memory saves power, similar to entering Idle mode. Turning off the oscillator saves even more  
power, but requires a reset to restart the MCU.  
The C8051F36x devices feature an additional low-power SUSPEND mode, which stops the internal oscil-  
lator until an awakening event occurs. See Section “16.1.1. Internal Oscillator Suspend Mode” on  
page 170 for more information.  
104  
Rev. 1.0