Si500D
Parameters
Condition
LVPECL/LVDS
Min
Typ
—
Max
460
Units
ps
—
—
Rise and Fall Times (20/80%)3
HCSL/Differential SSTL
Differential CMOS, 15 pF, >80 MHz
Mid-level
—
800
ps
—
1.1
—
1.6
ns
LVPECL Output Option
VDD – 1.5
VDD – 1.34
V
(DC coupling, 50 to VDD
–
Diff swing
Mid-level
.720
—
—
.880
—
VPK
V
2.0 V)3
Low Power LVPECL Output
Option
N/A
(AC coupling, 100 Differential
Diff swing
.68
—
.95
VPK
Load)3
Mid-level
Diff swing
1.15
0.25
—
—
—
—
—
—
—
—
—
1.26
0.45
0.96
0.45
0.425
0.82
55
V
VPK
V
LVDS Output Option (2.5/3.3 V)
(RTERM = 100 diff)3
Mid-level
0.85
LVDS Output Option (1.8 V)
(RTERM = 100 diff)3
Diff swing
0.25
VPK
V
Mid-level
0.35
HCSL Output Option3
CMOS Output Voltage3
Diff swing
0.65
VPK
V
DC termination per pad
VOH, sourcing 9 mA
VOL, sinking 9 mA
45
VDD – 0.6
—
—
0.6
V
.5 x VDD
0.375
–
SSTL-18
.5 x VDD + 0.375
—
V
SSTL Output Voltage4
SSTL-2
SSTL-3
.5 x VDD + 0.48
.45 x VDD + 0.48
—
—
.5 x VDD – 0.48
.45 VDD – 0.48
V
V
From time VDD crosses min spec
supply
Powerup Time
—
—
—
—
—
—
2
ms
ns
ns
OE Deassertion to Clk Stop
250 + 3 x TCLK
250 + 3 x TCLK
Return from Output Driver
Stopped Mode
Return From Tri-State Time
—
—
—
—
12 + 3 x TCLK
2
µs
Return From Powerdown Time
ms
ps
RMS
Non-CMOS
—
—
—
—
1
2
3
Period Jitter (1-sigma)
ps
RMS
CMOS, CL = 7 pF
1
1.0 MHz – min(20 MHz,
0.4 x FOUT),non-CMOS
1.0 MHz – min(20 MHz,
0.4 x FOUT),CMOS format
ps
RMS
0.6
0.7
1
Integrated Phase Jitter
ps
RMS
1.5
Notes:
1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4. Min column entries are minima of VOH. Max column entries are maxima of VOL.
2
Rev. 0.3
SILICON [ SILICON ]
