HIGH RIPPLE-REJECTION WLP PACKAGE LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.2.1
_00
S-L2985 Series
Precautions
•
Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
When mounting an output capacitor(C
L
) or an input capacitor(C
IN
), the distance from the capacitor to the
VOUT pin and to the VSS pin should be as short as possible.
•
Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or
less).
•
Generally a series regulator may cause oscillation, depending on the selection of external parts. The
following conditions are recommended for this IC. However, be sure to perform sufficient evaluation
including the temperature characteristic in the actual usage conditions to select the series regulator.
1.0
μF
or more
Input capacitor (C
IN
):
0.47
μF
or more
Output capacitor (C
L
):
Equivalent series resistance (ESR): 10
Ω
or less
•
The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or an input capacitor is not connected.
•
The application conditions for the input voltage, output voltage, and load current should not exceed the
package power dissipation.
•
The side of device silicon substrate is exposed to the marking side of device package. Since this portion
has lower strength against the mechanical stress than the standard plastic package, be careful of the
handing of a package enough against chip, crack etc. Moreover, the exposed side of silicon has
electrical potential of device substrate, and needs to be kept out of contact with the external potential.
•
In this package, the overcoat of the resin of translucence is carried out on the side of device. Keep it
mind that it may affect the characteristic of a device when exposed a device in the bottom of a high light
source.
•
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
•
In determining the output current, attention should be paid to the output current value specified in
Table
4
in the electrical characteristics and footnote *5) of the table.
•
SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
Seiko Instruments Inc.
13
SII [ SEIKO INSTRUMENTS INC ]
