BATTERY PROTECTION IC FOR SINGLE-CELL PACK
S-8261 Series
Rev.1.9_00
Pin Configurations
Table 2
SOT-23-6
Top view
Pin No. Symbol
Pin description
FET gate control pin for discharge
(CMOS output)
Voltage detection pin between VM and VSS
(Overcurrent detection pin)
FET gate control pin for charge
(CMOS output)
Test pin for delay time measurement
Positive power input pin
Negative power input pin
6
5
4
1
2
3
DO
VM
CO
4
5
6
DP
VDD
VSS
1
2
3
Figure 3
Table 3
6-Pin SNB(B)
Top view
Pin No. Symbol
Pin description
FET gate control pin for charge
(CMOS output)
6
5
4
1
2
3
CO
VM
DO
Voltage detection pin between VM and VSS
(Overcurrent detection pin)
FET gate control pin for discharge
(CMOS output)
4
5
6
VSS
DP
VDD
Negative power input pin
Test pin for delay time measurement
Positive power input pin
1
2
3
Bottom view
1
2
3
*1
6
5
4
*1. Connect the heatsink of back
side at shadowed area to the
board, and set electric
potential open or VDD.
However, do not use it as
the function of electrode.
Figure 4
Seiko Instruments Inc.
7
SII [ SEIKO INSTRUMENTS INC ]
