BATTERY PROTECTION IC FOR SINGLE-CELL PACK
S-8261 Series
Rev.1.9_00
Test Circuits
Remark Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level with respect to VSS.
(1) Test Condition 1, Test Circuit 1
〈〈 Overcharge Detection Voltage, Overcharge Hysteresis Voltage〉〉
The overcharge detection voltage (VCU) is defined by the voltage between VDD and VSS at which VCO goes
from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. The
overcharge hysteresis voltage (VHC) is then defined as the difference between the overcharge detection
voltage (VCU) and the voltage between VDD and VSS at which VCO goes from “H” to “L” when the voltage V1
is gradually decreased.
(2) Test Condition 2, Test Circuit 2
〈〈Overdischarge Detection Voltage, Overdischarge Hysteresis Voltage〉〉
The overdischarge detection voltage (VDL) is defined as the voltage between VDD and VSS at which VDO
goes from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V and
V2 = 0 V. The overdischarge hysteresis voltage (VHD) is then defined as the difference between the
overdischarge detection voltage (VDL) and the voltage between VDD and VSS at which VDO goes from “H” to
“L” when the voltage V1 is gradually increased.
(3) Test Condition 3, Test Circuit 2
〈〈 Overcurrent 1 Detection Voltage, Overcurrent 2 Detection Voltage, Load Short-Circuiting Detection
Voltage 〉〉
The overcurrent 1 detection voltage (VIOV1) is defined as the voltage between VM and VSS whose delay time
for changing VDO from “H” to “L” lies between the minimum and the maximum value of the overcurrent 1
detection delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition V1 =
3.5 V and V2 = 0 V.
The overcurrent 2 detection voltage (VIOV2) is defined as the voltage between VM and VSS whose delay time
for changing VDO from “H” to “L” lies between the minimum and the maximum value of the overcurrent 2
detection delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition V1 =
3.5 V and V2 = 0 V.
The load short-circuiting detection voltage (VSHORT) is defined as the voltage between VM and VSS whose
delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of the load
short-circuiting detection delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting
condition V1 = 3.5 V and V2 = 0 V.
(4) Test Condition 4, Test Circuit 2
〈〈 Charger Detection Voltage, Abnormal Charge Current Detection Voltage 〉〉
The charger detection voltage (VCHA) is defined as the voltage between VM and VSS at which VDO goes from
“L” to “H” when the voltage V3 is gradually decreased from 0 V after the voltage V1 is gradually increased
from the starting condition of V1 = 1.8 V and V2 = 0 V until the voltage V1 becomes V1 = VDL + (VHD / 2).
The charger detection voltage can be measured only in the product whose overdischarge hysteresis VHD ≠ 0.
Set V1 = 3.5 V and V2 = 0 V. Decrease V2 from 0 V gradually. The voltage between VM and VSS when
VCO goes from “H” to “L” is the abnormal charge current detection voltage. The abnormal charge current
detection voltage has the same value as the charger detection voltage (VCHA).
(5) Test Condition 5, Test Circuit 2
〈〈 Normal Operation Current Consumption, Power-Down Current Consumption〉〉
The operating current consumption (IOPE) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = 3.5 V and V2 = 0 V (Normal condition).
The power-down current consumption (IPDN) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = V2 = 1.5 V (Overdischarge condition).
Seiko Instruments Inc.
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