LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
(3) Power fluctuation
V =10 4V IOUT=30mA
→
IN
V =4 10V IOUT=30mA
→
IN
10V
4V
10V
4V
VIN
VIN
CL=2 F
µ
VOUT
CL=4.7 F
CL=4.7 F
µ
µ
VOUT
3V
3V
CL=2 F
µ
TIME(50usec/div)
Load dependence of overshoot
TIME(50usec/div)
Output capacitor (CL) dependence of overshoot
VIN=VOUT(S)+1V OUT(S)+2V, IOUT=30mA
V
→
VIN=VOUT(S)+1V
V
(S)+2V,CL=2 F
OUT
→
µ
0.05
0.04
0.03
0.02
0.01
0
0.6
VOUT=2V
0.4
0.2
0
3V
VOUT=2V
3V
5V
5V
1
10
CL(uF)
100
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00
IOUT(A)
VDD dependence of overshoot
Temperature dependence of overshoot
V =VOUT(S)+1V
0.06
V
OUT(S)+2V, IOUT=30mA,CL=2 F
→
µ
VIN=VOUT(S) 1V VDD, I =30mA,CL=2 F
IN
+
→
µ
OUT
0.6
0.4
0.2
0
3V
0.05
0.04
0.03
0.02
0.01
0
3V
VOUT=2V
VOUT=2V
5V
5V
-50
0
50
100
0
2
4
6
8
10
VDD(V)
Ta °C
16
Seiko Instruments Inc.