SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-817 Series
Rev.4.2_00
3. Output Voltage Adjustment Circuit (Only for S817B Series (Product without short circuit protection))
VIN
VIN
S-817
Series
V0
VOUT
R1
R2
VSS
CL
CIN
C1
GND
Figure 18
The output voltage can be boosted by using the configuration shown in Figure 18. The output Voltage
(VO) can be calculated using the following equation (VOUT(E):Effective output voltage):
VO = VOUT(E) × (R1 + R2) ÷ R1 + R2 × ISS
Set the values of resistors R1 and R2 so that the S-817 Series is not affected by current consumption
(ISS).
Capacitor C1 is effective in minimizing output fluctuation at powering on or due to power or load
fluctuation. Determine the optimum value on your actual device. But it is not also recommended to
attach a capacitor between the S-817 Series power source VIN and VSS pin or between output VOUT
and VSS pin because output fluctuation or oscillation at powering on might occur. As shown in Figure
18, a capacitor must be mounted between VIN and GND, and between VOUT and GND.
Precautions
• Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing
the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as
short as possible.
• Note that the output voltage may increase when a series regulator is used at low load current (1.0 µA or
less).
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The
following conditions are recommended for this IC. However, be sure to perform sufficient evaluation
under the actual usage conditions for selection, including evaluation of temperature characteristics.
Output capacitor (CL) :
Equivalent Series Resistance (ESR) : 30 Ω or less
Input series resistance (RIN) : 10 Ω or less
0.1 µF or more
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or an input capacitor is not connected.
• The application conditions for the input voltage, output voltage, and load current should not exceed the
package power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
18
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
