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S-1170B48PD-OUHTFG 参数 Datasheet PDF下载

S-1170B48PD-OUHTFG图片预览
型号: S-1170B48PD-OUHTFG
PDF下载: 下载PDF文件 查看货源
内容描述: 高纹波抑制率低压差型高输出电流CMOS电压稳压器 [HIGH RIPPLE-REJECTION AND LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR]
分类和应用: 稳压器调节器光电二极管输出元件ISM频段
文件页数/大小: 29 页 / 392 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR  
Rev.3.0_02  
S-1170 Series  
3. Shutdown pin (ON/OFF pin)  
This pin starts and stops the regulator.  
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-  
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially  
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided  
resistance of several hundreds kbetween the VOUT pin and VSS pin.  
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down  
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption  
increases if a voltage of 0.3 V to VIN 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not  
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.  
Table 6  
Logic Type  
ON/OFF Pin  
“L”: Power on  
“H”: Power off  
“L”: Power off  
“H”: Power on  
Internal Circuits  
Operating  
Stopped  
VOUT Pin Voltage  
Set value  
Current Consumption  
A
A
B
B
ISS1  
ISS2  
ISS2  
ISS1  
VSS level  
Stopped  
VSS level  
Operating  
Set value  
VIN  
ON/OFF  
VSS  
Figure 13  
14  
Seiko Instruments Inc.  
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