HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1
_00
S-1133 Series
*1.
V
OUT(S)
: Specified output voltage
V
OUT(E)
: Actual output voltage at the fixed load
The output voltage when fixing I
OUT
(= 100 mA) and inputting V
OUT(S)
+
1.0 V
*2.
The output current at which the output voltage becomes 95% of V
OUT(E)
after gradually increasing the output current.
*3.
V
drop
=
V
IN1
−
(V
OUT3
×
0.98)
V
OUT3
is the output voltage when V
IN
=
V
OUT(S)
+
1.0 V and I
OUT
=
100 mA.
V
IN1
is the input voltage at which the output voltage becomes 98% of V
OUT3
after gradually decreasing the input
voltage.
*4.
The change in temperature [mV/°C] is calculated using the following equation.
∆V
OUT
[
mV/
°
C
]
*1
=
V
OUT(S)
[
V
]
*2
×
∆V
OUT
[
ppm/
°
C
]
*3
÷
1000
∆Ta
∆Ta
V
OUT
*1.
The change in temperature of the output voltage
*2.
Specified output voltage
*3.
Output voltage temperature coefficient
*5.
The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not
be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This
specification is guaranteed by design.
Seiko Instruments Inc.
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