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S-1132B55-I6T2G 参数 Datasheet PDF下载

S-1132B55-I6T2G图片预览
型号: S-1132B55-I6T2G
PDF下载: 下载PDF文件 查看货源
内容描述: 高纹波抑制率低压差中输出电流CMOS电压稳压器 [HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR]
分类和应用: 稳压器调节器光电二极管输出元件
文件页数/大小: 35 页 / 530 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR  
Rev.3.2_00  
S-1132 Series  
„ Operation  
1. Basic operation  
Figure 13 shows the block diagram of the S-1132 Series.  
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-divided by  
feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary to ensure a certain  
output voltage free of any fluctuations of input voltage and temperature.  
VIN  
*1  
Current  
Error  
supply  
amplifier  
VOUT  
Vref  
Rf  
+
Vfb  
Reference  
voltage circuit  
Rs  
VSS  
*1. Parasitic diode  
Figure 13  
2. Output transistor  
The S-1132 Series uses a low on-resistance P-channel MOS FET as the output transistor.  
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse  
current flowing from the VOUT pin through a parasitic diode to the VIN pin.  
Seiko Instruments Inc.  
13