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S-1131B21UC-N4GTFG 参数 Datasheet PDF下载

S-1131B21UC-N4GTFG图片预览
型号: S-1131B21UC-N4GTFG
PDF下载: 下载PDF文件 查看货源
内容描述: 高纹波抑制率低压差中输出电流CMOS电压稳压器 [HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR]
分类和应用: 稳压器输出元件
文件页数/大小: 29 页 / 450 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTASG-E1R1E3G1USLeArTiOeRs  
Rev.3.0_01  
3. Shutdown pin (ON/OFF pin)  
The products with shutdown function performs starting and a stop the regulator.  
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-  
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially  
reduce the current consumption. The VOUT pin becomes the Vss level due to the internally divided  
resistance of several hundreds kbetween the VOUT pin and VSS pin.  
The structure of the ON/OFF pin is as shown in Figure 14. Since the ON/OFF pin is neither pulled down  
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption  
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not  
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.  
Table 7  
Logic Type  
ON/OFF Pin  
“L”: Power on  
“H”: Power off  
“L”: Power off  
“H”: Power on  
Internal Circuits  
Operating  
Stopped  
VOUT Pin Voltage  
Set value  
Current Consumption  
A
A
B
B
ISS1  
ISS2  
ISS2  
ISS1  
VSS level  
Stopped  
VSS level  
Operating  
Set value  
VIN  
ON/OFF  
VSS  
Figure 14  
„ Selection of Output Capacitor (CL)  
The S-1131 Series performs phase compensation using the internal phase compensator in the IC and the ESR  
(Equivalent Series Resistance) of the output capacitor to enable stable operation independent of changes in the  
output load. Therefore, always place a capacitor (CL) of 2.2 µF or more between VOUT and VSS pins.  
For stable operation of the S-1131 Series, it is essential to employ a capacitor whose ESR is within an optimum  
range. Using a capacitor whose ESR is outside the optimum range (approximately 0.5 to 5 ), whether larger  
or smaller, may cause an unstable output, resulting in oscillation. For this reason, a tantalum electrolytic  
capacitor is recommended.  
When a ceramic capacitor or an OS capacitor with a low ESR is used, it is necessary to connect an additional  
resistor that serves as the ESR in series with the output capacitor. The required resistance value is  
approximately 0.5 to 5 , which varies depending on the usage conditions, so perform sufficient evaluation for  
selection. Ordinarily, around 1.0 is recommended.  
Note that an aluminum electrolytic capacitor may increase the ESR at a low temperature, causing oscillation.  
When using this kind of capacitor, perform thorough evaluation, including evaluation of temperature  
characteristics.  
13  
Seiko Instruments Inc.