HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1111/1121 Series
Rev.4.1_00
Standard Circuit
Output
Input
VIN
VOUT
*2
*1
ON/OFF
CL
CIN
VSS
GND
Single GND
*1. CIN is a capacitor for stabilizing the input.
*2. A tantalum capacitor (2.2 μF or more) can be used.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Application Conditions
Input capacitor (CIN):
1.0 μF or more
Output capacitor (CL): 2.2 μF or more (tantalum capacitor)
Caution A general series regulator may oscillate, depending on the external components selected.
Check that no oscillation occurs with the application using the above capacitor.
11
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
