VOLTAGE DETECTOR WITH SENSE PIN
S-1002 Series
Rev.1.1_02
Electrical Characteristics
1. Nch open-drain output product
Table 11
(Ta = +25°C unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
V
−VDET(S)
− 0.022
−VDET(S)
× 0.99
−VDET(S)
+ 0.022
−VDET(S)
× 1.01
1.0 V ≤ −VDET(S) < 2.2 V
−VDET(S)
1
Detection voltage*1 −VDET
0.95 V ≤ VDD ≤ 10.0 V
2.2 V ≤ −VDET(S) ≤ 5.0 V
−VDET(S)
−VDET
V
1
1
2
−VDET
−VDET
Hysteresis width
VHYS
ISS
−
V
× 0.03 × 0.05 × 0.07
Current
VDD = 10.0 V, VSENSE = −VDET(S) + 1.0 V
−
0.50
0.90
μA
consumption*2
Operation voltage VDD
−
V
0.95
0.59
0.73
1.47
1.86
−
10.0
V
1
3
3
3
3
DD = 0.95 V
1.00
1.33
2.39
2.50
−
−
−
−
mA
mA
mA
mA
Output transistor
Nch
VDD = 1.2 V
VDD = 2.4 V
VDD = 4.8 V
Output current
IOUT
VDS*3 = 0.5 V
VSENSE = 0.0 V
Output transistor
Nch
Leakage current
ILEAK
−
−
0.08
μA
3
VDD = 10.0 V, VDS*3 = 10.0 V, VSENSE = 10.0 V
Detection voltage
temperature
coefficient*4
Detection
Δ−VDET
ΔTa • −VDET
1
4
ppm/°C
μs
Ta = −40°C to +85°C
−
−
100
40
350
tDET
VDD = 5.0 V
−
delay time*5
Release
−VDET(S) ≤ 2.4 V
VDD = 5.0 V
−
−
5.0
40
80
−
−
42.0
μs
μs
MΩ
MΩ
4
4
2
2
tRESET
delay time*6
2.4 V < −VDET(S)
1.0 V ≤ −VDET(S) < 1.2 V
1.2 V ≤ −VDET(S) ≤ 5.0 V
19.0
30.0
SENSE pin
resistance
RSENSE
6.0
98.0
*1. −VDET: Actual detection voltage value, −VDET(S): Set detection voltage value (the center value of the detection voltage
range in Table 3 or Table 4)
*2. The current flowing through the SENSE pin resistance is not included.
*3.
VDS: Drain-to-source voltage of the output transistor
*4. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation.
Δ−VDET
ΔTa
Δ−VDET
ΔTa • −VDET
*2
mV/°C *1 = −VDET(S) (typ.) V
×
ppm/°C *3 ÷ 1000
[ ]
[
]
[ ]
*1. Temperature change of the detection voltage
*2. Set detection voltage
*3. Detection voltage temperature coefficient
*5. The time period from when the pulse voltage of 6.0 V → −VDET(S) − 2.0 V or 0 V is applied to the SENSE pin to when
VOUT reaches VDD / 2, after the output pin is pulled up to 5.0 V by the resistance of 470 kΩ.
*6. The time period from when the pulse voltage of 0 V → −VDET(S) + 2.0 V or 6.0 V is applied to the SENSE pin to when
VOUT reaches VDD / 2, after the output pin is pulled up to 5.0 V by the resistance of 470 kΩ.
10
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