ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR
S-1000 Series
Rev.2.3_00
2. Power-on reset circuit
A power-on reset circuit can be constructed using Nch open-drain output product of S-1000 Series.
VDD
Di*2
R*1
VIN
S-1000N
OUT
*1
(Nch open-drain products)
C
VSS
*1. R should be 75 kΩ or less, and C should be 0.01 µF or more to prevent oscillation.
If C is not connected, R should be 800 Ω or less.
*2. Diode Di instantaneously discharges the charge stored in the capacitor (C) at the power falling, Di can be removed
when the delay of the falling time is not important.
Figure 26
VDD
(V)
OUT
(V)
t (s)
t (s)
Figure 27
Remark When the power rises sharply as shown in the Figure 28 left, the output may go to the high level for an instant
in the undefined region where the output voltage is undefined since the power voltage is less than the minimum
operation voltage.
VDD
(V)
OUT
(V)
t (s)
t (s)
Figure 28
Caution The above connection diagram and constants do not guarantee correct operation. Perform sufficient
evaluation using the actual application to set the constants.
22
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
