SAB 82525
SAB 82526
SAF 82525
SAF 82526
Functions of RTS Output
In clock modes 0, 1, 4 and 5, the RTS output can be programmed via CCR2 (SOC bits) to be
active when a frame is being transmitted. The signal is delayed by one clock period with
respect to the data output T×DA/T×DB, and marks all data bits that could be transmitted without
collision. In this way a configuration may be implemented in which the bus access is resolved
on a local basis (collision bus) and where the data are sent one clock period later on a separate
transmission line.
If the RTS output is used to control an external driver it has to be ANDed with the TxD pin in
order to drive the first bit correctly.
CxDA/B
Line
&
TxDA/B
RTSA/B
ITS02701
Collision
T xD
C xD
RTS
ITT00242
Figure 29
Request-to-Send in Bus Operation
Note: For regular and special RTS functions refer to chapter 5.5 and 6.6.
Semiconductor Group
62